PDF W164 Data sheet ( Hoja de datos )

Número de pieza	W164
Descripción	Spread Spectrum Desktop/Notebook System Frequency Generator
Fabricantes	Cypress Semiconductor
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No Preview Available ! W164 Spread Spectrum Desktop/Notebook System Frequency Generator Features Key Specifications • Maximized EMI suppression using Cypress’s Spread Spectrum technology • Reduces measured EMI by as much as 10 dB • I2C programmable to 153 MHz (16 selectable frequencies) • Two skew-controlled copies of CPU output • SEL100/66# selects CPU frequency (100 or 66.8 MHz) • Seven copies of PCI output (synchronous w/CPU output) • One copy of 14.31818-MHz IOAPIC output • One copy of 48-MHz USB output • Selectable 24-/48-MHz output is determined by resistor straps on power-up • One high-drive output buffer that produces a copy of the 14.318-MHz reference • Isolated core VDD pin for noise reduction Supply Voltages:....................................... VDDQ3 = 3.3V±5% VDDQ2 = 2.5V±5% CPU Cycle to Cycle Jitter: ........................................... 200 ps CPU, PCI Output Edge Rate: ......................................... ≥1 V/ns CPU0:1 Output Skew: ................................................ 175 ps PCI_F, PCI1:6 Output Skew: .......................................500 ps CPU to PCI Skew: .............................. 1 to 4 ns (CPU Leads) REF2X/SEL48#, SCLOCK, SDATA ................ 250-kΩ pull-up Note: Internal pull-up resistors should not be relied upon for setting I/O pins HIGH. Table 1. Pin Selectable Frequency SEL100/66# CPU(0:1) 1 100 MHz 0 66.8 MHz PCI 33.3 MHz 33.4 MHz Block Diagram X1 XTAL X2 OSC PLL Ref Freq VDDQ3 REF2X/SEL48# GND VDDQ3 IOAPIC VDDQ2 CPU0 CPU1 GND Pin Configuration X1 X2 GND PCI_F PCI1 PCI2 PCI3 PCI4 VDDQ3 PCI5 PCI6 VDDQ3 48MHz 24/48MHz 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 GND 27 REF2X/SEL48# 26 VDDQ3 25 VDDQ2 24 IOAPIC 23 VDDQ2 22 CPU0 21 CPU1 20 VDDQ3 19 GND 18 SDATA 17 SCLOCK 16 SEL100/66# 15 GND 100/66#_SEL PLL 1 ÷2/÷3/÷4 SDATA SCLOCK I2C LOGIC VDDQ3 PCI_F PCI1 PCI2 PCI3 PCI4 PCI5 PCI6 GND PLL2 VDDQ3 48MHz 24/48MHz GND Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 December 16, 1999, rev. ** 1 page W164 Writing Data Bytes Each bit in the data bytes controls a particular device function except for the “reserved” bits, which must be written as a logic 0. Bits are written MSB (most significant bit) first, which is bit 7. Table 4 gives the bit formats for registers located in Data Bytes 3–6. Table 5 details additional frequency selections that are avail- able through the serial data interface. Table 6 details the select functions for Byte 3, bits 1 and 0. Table 4. Data Bytes 3–6 Serial Configuration Map Affected Pin Bit Control Bit(s) Pin No. Pin Name Control Function 0 1 Data Byte 3 7 -- -- SEL_3 -- -- 6 -- -- SEL_2 Refer to Table 5 5 -- -- SEL_1 Refer to Table 5 4 -- -- SEL_0 Refer to Table 5 3 -- -- Frequency Table Selection Frequency Controlled Frequency Controlled by external SEL100/ by BYT3 SEL_(3:0) 66# pin Table 1 Table 5 2 -- -- (Reserved) -- -- 1–0 -- -- Bit 1 Bit 0 Function (See Table 6 for function details) 0 0 Normal Operation 0 1 Test Mode 1 0 Spread Spectrum on 1 1 All Outputs Three-stated Data Byte 4 7 -- -- (Reserved) -- -- 6 14 24/48MHz Clock output Disable Low Active 5 -- -- (Reserved) -- -- 4 -- -- (Reserved) -- -- 3 -- -- (Reserved) -- -- 2 21 CPU1 Clock Output Disable Low Active 1 -- -- (Reserved) -- -- 0 22 CPU0 Clock Output Disable Low Active Data Byte 5 7 4 PCI_F Clock Output Disable Low Active 6 11 PCI6 Clock Output Disable Low Active 5 10 PCI5 Clock Output Disable Low Active 4- -- (Reserved) -- -- 3 8 PCI4 Clock Output Disable Low Active 2 7 PCI3 Clock Output Disable Low Active 1 6 PCI2 Clock Output Disable Low Active 0 5 PCI1 Clock Output Disable Low Active Data Byte 6 7 -- -- (Reserved) -- -- 6 -- -- (Reserved) -- -- 5 24 IOAPIC Clock Output Disable Low Active 4 -- -- (Reserved) -- -- 3 -- -- (Reserved) -- -- 2 -- -- (Reserved) -- -- 1 27 REF2X Clock Output Disable Low Active 0 27 REF2X Clock Output Disable Low Active Note: 1. Both Bits 0 and 1 of Byte 6 in Table 4 must be programmed as the same value. Default 0 0 0 0 0 0 00 0 1 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0 0 1 0 0 0 1[1] 1[1] 5 5 Page Package Diagram 28-Pin Small Outline Integrated Circuit (SOIC, 300 mils) W164 © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 11 Page

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