|
|
PDF VT8501 Data sheet ( Hoja de datos )
| Número de pieza | VT8501 | |
| Descripción | APOLLO MVP4 | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de VT8501 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
9,$ 7HFKQRORJLHV
'HOLYHULQJ 9DOXH
97
$SROOR093
0+]
6LQJOH&KLS6RFNHW6XSHU1RUWK%ULGJH
ZLWK3&,6\VWHP%XV
,QWHJUDWHG$*3''*UDSKLFV$FFHOHUDWRU
DQG$GYDQFHG(&&0HPRU\&RQWUROOHU
VXSSRUWLQJ3&6'5$0
9LUWXDO&KDQQHO6'5$0('2DQG)3*'5$0
5HYLVLRQ
)HEUXDU\
9,$7(&+12/2*,(6,1&
1 page  
'HOLYHULQJ 9DOXH7HFKQRORJLHV ,QF
VT8501 Apollo MVP4
VGA Status / Enable Registers ............................................................................................................................................................. 74
VGA Sequencer Registers (SR) ............................................................................................................................................................ 75
VGA RAMDAC Registers .................................................................................................................................................................... 75
VGA Graphics Controller Registers (GR)............................................................................................................................................. 76
VGA CRT Controller Registers (CR) .................................................................................................................................................. 77
Extended Registers – Non-Indexed I/O Ports ....................................................................................................................................... 78
Extended Registers – VGA Sequencer Indexed .................................................................................................................................... 79
Extended Registers – VGA Graphics Controller Indexed ..................................................................................................................... 89
Extended Registers – VGA CRT Controller Indexed............................................................................................................................ 95
Extended Registers – CRTC Shadow.................................................................................................................................................. 109
3D Graphics Engine Registers ........................................................................................................................................... 110
Operational Concept ........................................................................................................................................................................... 110
Drawing............................................................................................................................................................................................... 111
Geometry Primitives............................................................................................................................................................................ 112
Synchronization .................................................................................................................................................................................. 115
Functional Blocks ............................................................................................................................................................................... 115
Bus Interface ....................................................................................................................................................................................... 115
Span Engine......................................................................................................................................................................... 116
Graphics Engine Core ........................................................................................................................................................ 117
Graphics Engine Organization ............................................................................................................................................................ 120
Setup Engine Registers ....................................................................................................................................................................... 121
Vertex Registers .................................................................................................................................................................................. 122
Rasterization Engine Registers............................................................................................................................................................ 123
Pixel Engine Registers ........................................................................................................................................................................ 130
Texture Engine Registers .................................................................................................................................................................... 136
Memory Interface Registers ................................................................................................................................................................ 138
Data Port Area..................................................................................................................................................................................... 138
FUNCTIONAL DESCRIPTIONS ................................................................................................................................................ 139
SYSTEM CONFIGURATION ......................................................................................................................................................... 139
DFP Interface Configuration............................................................................................................................................. 139
GRAPHICS CONTROLLER POWER MANAGEMENT ................................................................................................................... 140
Power Management States................................................................................................................................................. 140
Power Management Clock Control................................................................................................................................... 140
Power Management Registers ........................................................................................................................................... 140
ELECTRICAL SPECIFICATIONS............................................................................................................................................. 141
ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................... 141
DC CHARACTERISTICS.............................................................................................................................................................. 141
AC TIMING SPECIFICATIONS .................................................................................................................................................... 141
MECHANICAL SPECIFICATIONS ........................................................................................................................................... 147
Revision 1.3 February 1, 2000
-iii-
Table of Contents
5 Page 
'HOLYHULQJ 9DOXH7HFKQRORJLHV ,QF
VT8501 Apollo MVP4
• DVD
− Hardware-Assisted MPEG-2 Architecture for DVD with AC-3
− Simultaneous motion compensation and front-end processing (parsing, decryption and decode)
− Supports full DVD 1.0, VCD 2.0 and CD-Karaoke
− Microsoft DirectShow 2.x native support, backward compatible to MCI
− No additional frame buffer requirements
− Dynamic frame and field de-interlace filtering for high quality playback on VGA monitors (Bob and Weave)
− Tamper-proof software CSS implementation
− Freeze, Fast-Forward, Slow Motion, Reverse
− Pan-and-Scan support for 16:9 sequence
• Video Processor
− On-chip Color Space Converter (CSC)
− Anti-tearing via two frame buffer based capture surfaces
− Minifier for video stream compression and filtering
− Horizontal/vertical interpolation with edge recovery
− Dual frame buffer apertures for independent memory access for graphics and video
− YUV 4:2:2/4:1:1/4:2:0 and RGB formats
− Capture / ZV Port to MPEG and video decoder
− Vertical Blank Interval for Intercast™
− Overlay differing video and graphic color depths
− Display two simultaneous video streams from both internal AGP and Capture / ZV Port
− Two scalers and Color Space Converters (CSC) for independent windows
• Digital Flat Panel (DFP) Interface
− 85MHz DFP interface supports 1024x768 panels
− Allows external TMDS transmitter for advanced panel interfaces
• Testability
− Build-in NAND-tree pin scan test capability
Revision 1.3 February 1, 2000
-5-
Features
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet VT8501.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| VT8501 | APOLLO MVP4 | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |