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PDF VT83205S1 Data sheet ( Hoja de datos )

Número de pieza VT83205S1
Descripción 3.3V Low Phase Noise VCXO Voltage-Controlled Crystal Oscillator and PLL Clock Synthesizer
Fabricantes Vaishali Semiconductor 
Logotipo Vaishali Semiconductor Logotipo



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No Preview Available ! VT83205S1 Hoja de datos, Descripción, Manual

Applications
= Telecom switching
= Set-top boxes
VT83205
3.3V Low Phase Noise VCXO
(Voltage-Controlled Crystal Oscillator)
and PLL Clock Synthesizer
= HDTV
= MPEG Video clock source
General Description
The Vaishali VT83205 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer.
The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 14.318 MHz,
30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks. A 0 to 3V
control signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs SO:S2
are used for frequency and output selection.
Features
= 3.3V supply operation
= Packaged in 16-pin SOIC & QSOP packages.
= Replaces separate VCXO and multiplier
= Uses inexpensive pullable crystal
= On-chip VCXO with 200 ppm pull range (±100
ppm)
= 5V-tolerant control inputs
= Zero ppm synthesis error in both clocks
Figure 1. Functional Block Diagram
VDD1
VDD2
VIN
X2
10-14 MHz
Pullable
Crystal
Load Cap Control
Load
Caps
Low
osc Phase
Noise
PLL
X1
S2:S0
Output
Buffer
CLK1
Output
Buffer
OE
CLK2
2001-03-08
Vaishali Semiconductor
Page 1
www.vaishali.com
1300 White Oaks Road, Ste. 200 Campbell
CA 95008
Ph. 408.377.6060
MDST-0001-01
Fax 408.377.6063

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