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PDF VT82C686A Data sheet ( Hoja de datos )

Número de pieza VT82C686A
Descripción PCI SUPER-I/O INTEGRATED PERIPHERAL CONTROLLER
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! VT82C686A Hoja de datos, Descripción, Manual

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VT82C686A pdf
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VT82C686A
Function 4 Regs - Power Management, SMBus and HWM.............................................................................................. 82
PCI Configuration Space Header .......................................................................................................................................................... 82
Power Management-Specific PCI Configuration Registers .................................................................................................................. 83
Hardware-Monitor-Specific Configuration Registers ........................................................................................................................... 90
System Management Bus-Specific Configuration Registers ................................................................................................................. 90
Power Management I/O-Space Registers .............................................................................................................................................. 91
System Management Bus I/O-Space Registers.................................................................................................................................... 100
Hardware Monitor I/O Space Registers .............................................................................................................................................. 103
Function 5 & 6 Registers - AC97 Audio & Modem Codecs ............................................................................................ 107
PCI Configuration Space Header Function 5 Audio ........................................................................................................................ 107
PCI Configuration Space Header Function 6 Modem...................................................................................................................... 108
Function 5 & 6 Codec-Specific Configuration Registers .................................................................................................................... 109
I/O Base 0 Registers Audio/Modem Scatter/Gather DMA................................................................................................................ 111
I/O Base 1 Registers Audio FM NMI Status Registers .................................................................................................................... 115
I/O Base 2 Registers MIDI / Game Port........................................................................................................................................... 115
Memory Mapped I/O APIC Registers (CG Silicon)............................................................................................................................ 116
Indexed I/O APIC 32-Bit Registers (CG Silicon) ............................................................................................................................... 116
FUNCTIONAL DESCRIPTIONS ................................................................................................................................................ 118
POWER MANAGEMENT.............................................................................................................................................................. 118
Power Management Subsystem Overview .......................................................................................................................................... 118
Processor Bus States ........................................................................................................................................................................... 118
System Suspend States and Power Plane Control ............................................................................................................................... 119
General Purpose I/O Ports................................................................................................................................................................... 119
Power Management Events ................................................................................................................................................................. 120
System and Processor Resume Events ................................................................................................................................................ 120
Legacy Power Management Timers .................................................................................................................................................... 121
System Primary and Secondary Events ............................................................................................................................................... 121
Peripheral Events ................................................................................................................................................................................ 121
ELECTRICAL SPECIFICATIONS............................................................................................................................................. 122
ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................... 122
DC CHARACTERISTICS.............................................................................................................................................................. 123
POWER CHARACTERISTICS ....................................................................................................................................................... 123
PACKAGE MECHANICAL SPECIFICATIONS ...................................................................................................................... 124
Revision 1.82 March 2, 2001
-iii-
Table of Contents

5 Page





VT82C686A arduino
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VT82C686A
The VT82C686A also enhances the functionality of the standard ISA peripherals. The integrated interrupt controller supports both
edge and level triggered interrupts channel by channel. The integrated DMA controller supports type F DMA in addition to
standard ISA DMA modes. Compliant with the PCI-2.2 specification, the VT82C686A supports delayed transactions and remote
power management so that slower ISA peripherals do not block the traffic of the PCI bus. Special circuitry is built in to allow
concurrent operation without causing dead lock even in a PCI-to-PCI bridge environment. The chip also includes eight levels
(doublewords) of line buffers from the PCI bus to the ISA bus to further enhance overall system performance.
CPU / Cache
Sideband Signals:
Init / CPUreset
IRQ / NMI
SMI / StopClk
FERR / IGNNE
SLP# (Slot-1)
CA
CD
Boot ROM
RTC
Crystal
North Bridge
VT82C686A
352 BGA
Expansion
Cards
ISA
MA/Command System Memory
MD
DIMM Module ID
PCI
SMB
USB Ports 0-3
Keyboard / Mouse
MIDI / Game Ports
Parallel Port
Expansion
Cards
Serial Ports 1 and 2
Infrared Comm Port
IDE Primary and Secondary
Floppy Disk Interface
AC97 Link
Hardware Monitor Inputs
GPIO, Power Control, Reset
Figure 1. PC System Configuration Using the VT82C686A
Revision 1.82 March 2, 2001
-5-
Overview

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