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PDF UPD17933 Data sheet ( Hoja de datos )

Número de pieza UPD17933
Descripción 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE
Fabricantes NEC 
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD17933, 17934
4-BIT SINGLE-CHIP MICROCONTROLLERS
WITH DIGITAL TUNING SYSTEM HARDWARE
The µPD17933 and 17934 are 4-bit single-chip CMOS microcontrollers with hardware for digital tuning
systems (DTSs).
These microcontrollers integrate a prescaler that operates at a voltage as low as 1.05 V and up to 220 MHz,
a PLL frequency synthesizer, an intermediate frequency (IF) counter, and an LCD controller/driver on a single
chip.
Therefore, a high-performance digital tuning system for a portable set can be organized with a single chip.
FEATURES
• Program memory (ROM)
µPD17933
: 12K bytes (6144 × 16 bits)
µPD17934
: 16K bytes (8192 × 16 bits)
• General-purpose data memory (RAM) )
448 × 4 bits
• Instruction execution time
53.3 µs (with 75-kHz crystal resonator)
• PLL frequency synthesizer
Dual modulus prescaler (220 MHz MAX.),
programmable divider, phase comparator,
charge pump
• Peripheral hardware
General-purpose I/O ports, LCD controller/driver,
serial interface, A/D converter, BEEP output,
frequency counter
• Interrupt
External: 1 source
Internal : 3 sources
• Reset by RESET pin
• Low power consumption
• Supply voltage: VDD = 1.05 to 1.8 V
ORDERING INFORMATION
Part Number
µPD17933GK-×××-BE9
µPD17934GK-×××-BE9
Package
80-pin plastic TQFP (12 × 12 mm, 0.5 mm pitch)
80-pin plastic TQFP (12 × 12 mm, 0.5 mm pitch)
Remark ××× indicates ROM code suffix.
Unless otherwise specified, the µPD17934 is explained as the representative model in this document.
The information in this document is subject to change without notice.
Document No. U11947EJ2V0DS00 (2nd edition)
Date Published July 1998 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1997

1 page




UPD17933 pdf
BLOCK DIAGRAM
P0A0, P0A1 2
P0B0-P0B3 4
P0C0-P0C3 4
P0D0-P0D3 4
P1A0-P1A3 4
P1C0-P1C3 4
P1D0-P1D3 4
P2A0-P2A2 3
P2B0-P2B3 4
P2C0-P2C3 4
Port
REGLCD0
REGLCD2
CAPLCD0
CAPLCD3
COM0
COM3
LCD0
LCD16
LCD17/P2A0
LCD19/P2A2
Voltage
doubler
LCD
controller/
driver
RAM
448 × 4 bits
SYSTEM REG.
ALU
Instruction
decoder
ROM
µPD17933
: 6144 × 16 bits
µPD17934
: 8192 × 16 bits
Program counter
Stack
4 × 13 bits
AD0/P0D1
AD1/P0D2
AD2/P0D3
A/D
converter
XIN
OUTX
OSC
CPU
Peripheral
µPD17933, 17934
Serial
interface
BEEP
Interrupt
controller
8-bit
timer
Basic
timer0
Basic
timer1
Frequency
counter
PLL
PLL
voltage
regulator
Reset
SCK/P0B0
SI1/SO2/P0B1
SO1/P0B2
BEEP/P0B3
INT
TM0/P1C0
TM1/P1C1
FMIFC/AMIFC/P1C3
AMIFC/P1C2
EO0
EO1
VCOL
VCOH
VDD0-VDD2
RESET
GND
5

5 Page





UPD17933 arduino
µPD17933, 17934
1. PIN FUNCTIONS
1.1 Pin Function List
Pin No. Symbol
Function
Output Form
1 PIC0/TM0 Port 1C, timer event input pins, IF counter (for frequency count) input pin for
2 P1C1/TM1 the AM/FM.
3 P1C2/AMIFC • PIC0 through P1C3
4 P1C3/FMIFC/ 4-bit input port
AMIFC
• TM0 and TM1
Timer event input pins
• AMIFC
IF counter input pin for AM
• FMIFC
IF counter input pin for FM
At reset
On clock stop
Reset by RESET pin
WDT&SP reset
Input (P1C0-P1C3)
Input (P1C0-P1C3)
Input (P1C0-P1C3)
80 VDD2
Power supply pins. Supply the same voltage to these pins.
5 VDD1
32 VDD0
VDD2: Supplies power to the comparator and peripherals of the A/D converter,
and to the IF counter.
VDD1: Supplies power to the PLL.
VDD0: Supplies power to all the internal circuits except the above.
6 NC
No connection
7 EO0
8 EO1
Output from the charge pump of the PLL frequency synthesizer.
These pins output the result of comparing the phases of the divided frequency
of local oscillation with the reference frequency.
CMOS
3-state
At reset
On clock stop
Reset by RESET pin
WDT&SP reset
High-impedance output High-impedance output High-impedance output
9 VCOL
Input of the local oscillation (VCO) frequency of the PLL.
10 VCOH
• VCOL
• Active when HF or MF mode selected by program; otherwise; pulled down.
• VCOH
• Active when VHF mode selected by program; otherwise, pulled down.
Because these input pins are connected to an internal AC amplifier, cut the
DC component of the input signal with a capacitor.
11 GND
79
Ground
12 TEST
Test input pin. Be sure to connect this pin directly to GND.
13 RESET
Reset input
11

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