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PDF UPD17226CT Data sheet ( Hoja de datos )

Número de pieza UPD17226CT
Descripción 4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD17225, 17226, 17227, 17228
4-BIT SINGLE-CHIP MICROCONTROLLER
FOR SMALL GENERAL-PURPOSE INFRARED
REMOTE CONTROL TRANSMITTER
DESCRIPTION
µPD17225, 17226, 17227, 17228 (hereafter called µPD17225 subseries) are 4-bit single-chip microcontrollers for
small general-purpose infrared remote control transmitters.
It employs a 17K architecture of general-purpose register type devices for the CPU, and can directly execute
operations between memories instead of the conventional method of executing operations through the accumulator.
Moreover, all the instructions are 16-bit 1-word instructions which can be programmed efficiently.
In addition, a one-time PROM model, µPD17P218, to which data can be written only once, is also available. It is
convenient either for evaluating the µPD17225 subseries programs or small-scale production of application systems.
Detailed functions are described in the following manual. Be sure to read this manual when designing your
system.
µPD172×× Subseries User's Manual: U12795E
FEATURES
• Infrared remote controller carrier generator circuit (REM output)
• 17K architecture: General-purpose register system
• Program memory (ROM), Data memory (RAM)
Program memory (ROM)
Data memory (RAM)
µPD17225
4 K bytes
(2048 × 16)
µPD17226
8 K bytes
(4096 × 16)
111 × 4 bits
µPD17227
12 K bytes
(6144 × 16)
µPD17228
16 K bytes
(8192 × 16)
223 × 4 bits
• 8-bit timer
: 1 channel
• Basic internal timer/Watchdog timer : 1 channel (WDOUT output)
• Instruction execution time (can be changed in two steps)
at fX = 4 MHz
: 4 µs (high-speed mode)/8 µs (ordinary mode)
at fX = 8 MHz
: 2 µs (high-speed mode)/4 µs (ordinary mode)
• External interrupt pin (INT)
:1
• I/O pins
: 20
• Supply voltage
: VDD = 2.2 to 3.6 V (at fX = 8 MHz (high-speed mode))
VDD = 2.0 to 3.6 V (at fX = 4 MHz (high-speed mode))
• Low-voltage detector circuit (mask option)
Unless otherwise specified, the µPD17225 is treated as the representative model throughout this document.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U12643EJ2V0DS00 (2nd edition)
Date Published April 1999 N CP (K)
Printed in Japan
The mark shows major revised points.
©
1997,1999

1 page




UPD17226CT pdf
BLOCK DIAGRAM
P0A0
P0A1
P0A2
P0A3
P0B0
P0B1
P0B2
P0B3
P0C0
P0C1
P0C2
P0C3
P0D0
P0D1
P0D2
P0D3
P0E0
P0E1
P0E2
P0E3
P0A
P0B
P0C
P0D
P0E
µPD17225, 17226, 17227, 17228
RF
RAM
µ PD17225, 17226 : 111 × 4 bits
µ PD17227, 17228 : 223 × 4 bits
SYSTEM REG.
ALU
ROM
µ PD17225 : 2048 × 16 bits
µ PD17226 : 4096 × 16 bits
µ PD17227 : 6144 × 16 bits
µ PD17228 : 8192 × 16 bits
Instruction
Decoder
Program Counter
Stack (5 levels)
Basic Interval/
Watchdog Timer
Remote
Control
Divider
REM
8-bit Timer
Interrupt
Controller
INT
Power
Supply
Circuit
CPU Clock
OSC
RESET
WDOUT
VDD
GND
XIN
XOUT
Data Sheet U12643EJ2V0DS00
5

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UPD17226CT arduino
µPD17225, 17226, 17227, 17228
2. MEMORY SPACE
2.1 Program Counter (PC)
The program counter (PC) specifies an address of the program memory (ROM).
The program counter is an 11/12/13-bit binary counter as shown in Figure 2-1.
Its contents are initialized to address 0000H at reset.
Figure 2-1. Configuration of Program Counter
Page
MSB
LSB
PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PC (µPD17225)
PC (µPD17226)
PC (µPD17227, 17228)
2.2 Program Memory (ROM)
The configuration of the program memory is as follows:
Part Number
µPD17225
µPD17226
µPD17227
µPD17228
Capacity
2048 × 16 bits
4096 × 16 bits
6144 × 16 bits
8192 × 16 bits
Address
0000H-07FFH
0000H-0FFFH
0000H-17FFH
0000H-1FFFH
The program memory stores a program, interrupt vector table, and fixed data table.
The program memory is addressed by the program counter.
Figure 2-2 shows the program memory map. The entire range of the program memory can be addressed by the BD
addr, BR @AR, CALL @AR, MOVT DBF, and @AR instructions. Note, however, that the subroutine entry addresses that
can be specified by the CALL addr instruction are from 0000H to 07FFH.
Data Sheet U12643EJ2V0DS00
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