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PDF UPD16803 Data sheet ( Hoja de datos )
| Número de pieza | UPD16803 | |
| Descripción | MONOLITHIC DUAL H BRIDGE DRIVER CIRCUIT | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16803
MONOLITHIC DUAL H BRIDGE DRIVER CIRCUIT
DESCRIPTION
The µPD16803 is a monolithic dual H bridge driver circuit which uses N-channel power MOS FETs in its driver stage.
By employing the power MOS FETs for the output stage, this driver circuit has a substantially improved saturation voltage
and power consumption as compared with conventional driver circuits that use bipolar transistors.
In addition, the drive current can be adjusted by an external resistor in a power-saving mode.
The µPD16803 is therefore ideal as the driver circuit of the 2-phase excitation, bipolar-driven stepping motor for the head
actuator of an FDD.
FEATURES
• Low ON resistance (sum of ON resistors of top and bottom transistors)
RON1 = 1.5 Ω TYP. (VM = 5.0 V)
RON2 = 2.0 Ω TYP. (VM = 12.0 V)
• Low current consumption: IDD = 0.4 mA TYP.
• Stop mode function that turns OFF all output transistors
• Compact surface mount package: 20-pin plastic SOP (300 mil)
PIN CONFIGURATION (Top View)
C1H
C2L
VM1
1A
PGND
2A
VDD
IN1
IN2
INC
1
2
3
4
5
6
7
8
9
10
20 C1L
19 C2H
18 VG
17 1B
16 PGND
15 2B
14 VM2
13 RX
12 PS
11 DGND
Document No. S11452EJ2V0DS00 (2nd edition)
Date Published July 1997 N
Printed in Japan
© 1997
1 page  
µPD16803
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol MIN. TYP. MAX. Unit
Supply voltage (motor block)
Supply voltage (control block)
RX pin connection resistance
H bridge driver currentNote
Charge pump capacitance
Operating temperature
VM
VDD
RX
IDR
C1 to C3
TA
4.0
4.0
2
5
0
5.0 13.2 V
5.0 6.0 V
kΩ
±380 mA
20 nF
60 °C
Note When mounted on a printed circuit board (100 × 100 × 1 mm, glass epoxy)
ELECTRICAL SPECIFICATIONS (Within recommended operating conditions unless otherwise specified)
Parameter
OFF VM pin current
Symbol
IM
Conditions
INC pin lowNote 1 VM = 6.0 V
VDD = 6.0 V
MIN.
TYP.
MAX.
1.0
Unit
µA
VM = 13.2 V
VDD = 6.0 V
1.0 mA
VDD pin current
IDD Note 2
0.4 1.0 mA
IN1, IN2, INC pin high-level
IIH1 TA = 25 °C, VIN = VDD
1.0 µA
input current
0 ≤ TA ≤ 60 °C, VIN = VDD
2.0
IN1, IN2, INC pin low-level input
IIL1 TA = 25 °C, VIN = 0 V
–0.15 mA
current
0 ≤ TA ≤ 60 °C, VIN = 0 V
–0.2
PS pin high-level input current
IIH2 TA = 25 °C, VIN = VDD
0.15
mA
0 ≤ TA ≤ 60 °C, VIN = VDD
0.2
PS pin low-level input current
IIL2 TA = 25 °C, VIN = 0 V
–1.0
µA
0 ≤ TA ≤ 60 °C, VIN = 0 V
–2.0
IN1, IN2, INC pin input pull-up
RINU
TA = 25 °C
35 50 65 kΩ
resistance
0 ≤ TA ≤ 60 °C
25 75
PS pin input pull-down resistance
RIND
TA = 25 °C
35 50 65 kΩ
0 ≤ TA ≤ 60 °C
25 75
Control pin high-level input voltage
VIH
3.0 VDD + 0.3 V
Control pin low-level input voltage
VIL
–0.3
0.8 V
H bridge circuit ON
resistanceNote 3
RON relative accuracy
RON1
RON2
∆RON
VDD = 5 V, VM = 5 V
VDD = 5 V, VM = 12 V
Excitation direction <2>, <4>Note 4
1.5 3.0
2.0 4.0
±5
Ω
%
Excitation direction <1>, <3>
VX voltage in power-saving modeNote 5 VX VDD = VM = 5 V, RX = 50 kΩ
VX relative accuracy in
∆VX Excitation direction <2>, <4>Note 4
±10
2.5
±5
V
%
power-saving mode
Excitation direction <1>, <3>
±5
Charge pump circuit (VG) turn ON time
TONG
VDD = 5 V, VM = 5 V
0.3 2 ms
H bridge circuit turn ON time
TONH
C1 = C2 = C3 = 10 nF
5 µs
H bridge circuit turn OFF time
TOFFH
RM = 20 Ω
5 µs
Notes 1. When VDD < VM, a current (IM1) always flow from the VM1 pin to the charge pump circuit because a gate voltage
(2 × VDD + VM) is generated.
2. When IN1 = IN2 = INC = “H”, PS = “L”
3. Sum of ON resistances of top and bottom transistors
4. For the excitation direction, refer to FUNCTION TABLE.
5. VX is a voltage at point A (FORWARD) or B (REVERSE) of the H bridge in Function Table.
5
5 Page 
[MEMO]
µPD16803
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet UPD16803.PDF ] | |
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