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PDF UPC8139GR-7JH Data sheet ( Hoja de datos )

Número de pieza UPC8139GR-7JH
Descripción RF UP-CONVERTER WITH AGC FUNCTION + IF QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
Fabricantes NEC 
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PRELIMINARY DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC8139GR-7JH
Single Chip Transceiver Silicon MMIC for PHS
DESCRIPTION
The µPC8139GR-7JH is a silicon microwave monolithic IC (SiMMIC) developed as a transceiver for Personal
Handyphone System (PHS).
This IC is a highly integrated single chip, suitable for PHS, including a quadrature modulator, up converter, and
AGC circuit for adjusting the output level in the transmitter block, a 2nd down converter and RSSI circuit in the
receiver block, and a transistor for 2nd VCO.
This low power IC employs NEC’s proprietary bipolar process NESATTM IV (fT = 20 GHz) and also has a built-in
power save function, which contributes to lowering power consumption of the RF block.
This IC is packaged in a small, thin 30 pin plastic TSSOP (225 mil).
FEATURES
• Low voltage operation, low current consumption
VCC = 2.7 to 4.0 V, ICC = 32.5 mA at transmitter, ICC = 4.8 mA at receiver, 3.2 mA/@VCC = 3 V at 2nd VCO block
• LPF is installed to suppress leakage of transmitter’s local (L01) harmonics.
Spurious within transmission band (LO1 × 7, 8): –55 dBc (MAX.)
• On-chip AGC circuit for adjusting the output level: GCR = 20 dB (MIN.) /@fRFout = 1906.55 MHz
• High-performance
Output level: PRFout = –13 dBm (TYP.) /@fRFout = 1906.55 MHz, VI/Q = 500 mVP-P (Differential phase)
Error vector magnitude: EVM = 1.0% rms (TYP.)
Adjacent channel leak power: Padj = –68 dBc (TYP.) /@f = ±600 kHz
RSSI output dynamic range: 83 dB
• CR phase shifter is adopted.
APPLICATION
• Digital cordless telephone: PHS
• PHS application equipment: PDA, PC card, etc.
ORDERING INFORMATION
Part Number
Package
Supplying Form
µPC8139GR-7JH-E1
30-pin plastic TSSOP (225 mil)
Embossed tape 16 mm-wide. Pin 1 is in pull-out direction. 2.5
kp/reel
Remark To order evaluation samples, contact your local NEC sales office. (Part Number for sample order:
µPC8139GR-7JH)
Caution This product is an electrostatic sensitive device.
The information in this document is subject to change without notice.
Document No. P13117EJ1V0DS00 (1st edition)
Date Published December 1998 N CP(K)
Printed in Japan
© 1998

1 page




UPC8139GR-7JH pdf
µPC8139GR-7JH
ELECTRICAL SPECIFICATIONS (1)
TA = +25°C, VCC = 3.0 V, unless otherwise specified, VPS-TX/VAGC = 3.0 V, VPS-RX = 3.0 V (high), I/Q (DC) = Ib/Qb (DC)
= VCC/2 = 1.5 V, VI/Qin = 500 mVP-P (double phase input) , fI/Qin = 24 kHz, π/4DQPSK modulated wave input
Transmission rate: 384 kbps, Filter roll-off rate : α = 0.5, MOD pattern: all zero, fMOD LOin = 233.15 MHz,
PMODLOin = –7 dBm, fTX MIX-LOin = 1673.4 MHz, PTX MIX-LOin = –10 dBm, fTX MIXout = 1906.55 MHz + fI/Qin
Parameter
Symbol
Condition
MIN.
Total characteristics
Total circuit current (TX + RX +
VCO)
ICC (TOTAL)
No signal input
33
Transmitter block total characteristics (quadrature modulator + up converter + AGC circuit)
Total circuit current (TX)
ICC (TX-TOTAL)
No signal input
27
Dark current at power save (TX)
ICC (PS) TX-TOTAL
VPS 0.5 V (Low), No
signal input
Transmitter block (quadrature modulator + up converter + AGC circuit)
Total output level
PTX MIXout
VAGC = 3.0 V
–17
Local carrier leak
LOL
fMODin LOin + fTX MIX-LOin
Image rejection (side-band leak)
ImR
I/Q 3rd order inter-modulation
distortion
IM3 (I/Q)
AGC circuit gain control range
GCR
VAGC = 3 V 1 V
20
Error vector magnitude (vector error) EVM
MOD pattern: PN 9
Adjacent channel leak power
Padj
f = ±600 kHz,
MOD pattern: PN 9
Spurious within transmission band 1
Pout
(7 MOD LO)
fMOD LOin = 259.25 MHz
fMOD LOin × 7, fMOD LOin × 7
(Image)
Spurious within transmission band 2
Pout
(8 MOD LO)
fMOD LOin = 233.15 MHz
fMOD LOin × 8, fMOD LOin × 8
(Image)
Power saving
Rise time
TPS-TX (Rise)
VPS-TX = 0 V 3 V
response time
Fall time
TPS-TX (Fall)
VPS-TX = 3 V 0 V
I/Q input impedance
ZI/Q
Value between Pins I/Ib and
Q/Qb
I/Q input bias current
Power save
Power save
Note 1
low
Note 2
high
II/Q
VPS-TX (Low)
VPS-TX (High)
Value of each pin when
VI = VIb = VQ = VQb
3.5
0
0.9
Notes 1. Power save pin applied voltage in sleep mode
2. Power save pin applied voltage in active mode
TYP.
40.5
32.5
0.1
–13
–40
–40
–50
35
1.0
–68
–65
–65
2
2
180
7
MAX. Unit
49 mA
39.5 mA
5 µA
– dBm
–30 dBc
–30 dBc
–30 dBc
– dB
5 %rms
–60 dBc
–55 dBc
–55 dBc
5 µs
5 µs
– k
16 µA
0.5 V
VCC
V
Preliminary Data Sheet
5

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UPC8139GR-7JH arduino
µPC8139GR-7JH
RELATION BETWEEN I/Q PIN INPUT SIGNAL POTENTIAL AND UPPER LIMIT AMPLITUDE
Power Supply Voltage (V)
VCC
I/Q bias voltage (V)
VCC/2 = I = Ib = Q = Qb
Input Amplitude (mVP-P)
Single ended Input
I=Q
Differential Phase Input
I = Ib = Q = Qb
2.7 1.35
400
600
to to
3.0 1.5
800
600
to to
4.0 2.0
1000
600
COMPARISON OF I/Q INPUT AMPLITUDES IN THE SAME TX OUTPUT LEVEL
Power Supply Voltage (V)
VCC
I/Q bias voltage (V)
VCC/2 = I = Ib = Q = Qb
Input Amplitude (mVP-P)
Single ended
Input
I=Q
Differential
Phase Input
I = Ib = Q = Qb
Reference Characteristics
TX Total Output Level
(dBm)
PTX-MIXout
2.7
1.35 400 200
–20
3.0
1.5 800 400
–14
4.0
2.0
1200
600
–10.5
Preliminary Data Sheet
11

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