PDF UPB1003GS Data sheet ( Hoja de datos )

Número de pieza	UPB1003GS
Descripción	REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
Fabricantes	NEC
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No Preview Available ! PRELIMIDNAATRAY SDHAETEAT SHEET BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT µPB1005K REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER + PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER DESCRIPTION The µPB1005K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip. The µPB1005K features 36-pin plastic QFN, fixed prescaler and supply voltage. The 36-pin plastic QFN package is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter data. Supply voltage is 3 V. Thus, the µPB1005K can make RF block fewer components and lower power consumption. This IC is manufactured using NEC’s 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability. FEATURES • Double conversion : fREFin = 16.368 MHz, f2ndIFout = 4.092 MHz • Integrated RF block : RF/IF frequency down-converter + PLL frequency synthesizer • High-density surface mountable : 36-pin plastic QFN (6.0 × 6.0 × 0.95 mm) • Needless to input counter data : fixed division internal prescaler • VCO side division : ÷ 200 (÷ 25, ÷ 8 serial prescaler) • Reference division : ÷2 • Supply voltage : VCC = 2.7 to 3.3 V • Low current consumption : ICC = 45.0 mA TYP.@VCC = 3.0 V • Gain adjustable externally : Gain control voltage pin (control voltage up vs. gain down) APPLICATION • Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz ORDERING INFORMATION Part Number µPB1005K-E1 Package 36-pin plastic QFN Supplying Form Embossed tape 12 mm wide. Pin 1 is in pull-out direction. Qty 2.5 kp/reel. Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: µPB1005K) Caution Electro-static sensitive device The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. P14016EJ1V0DS00 (1st edition) Date Published November 1999 N CP(K) Printed in Japan © 1999 1 page µPB1005K ELECTRICAL CHARACTERISTICS (Unless otherwise specified TA = +25 °C, VCC = 3.0 V) Parameter Symbol Conditions MIN. TYP. Total Circuit Current ICCtotal ICC1 + ICC2 + ICC3 + ICC4 32.0 45.0 RF Down-converter Block (fRFin = 1575.42 MHz, f1stLOin = 1636.80 MHz, PLOin = −10 dBm, ZS = ZL = 50 Ω) Circuit Current 1 ICC1 No Signals 6.0 RF Conversion Gain CGRF PRFin = −40 dBm 12.5 RF-SSB Noise Figure NFRF PRFin = −40 dBm 7.0 Maximum IF Output PO(sat)RF PRFin = −10 dBm −5.5 IF Down-converter Block (f1stIFIn = 61.38 MHz, f2ndLOIn = 65.472 MHz, ZS = 50 Ω, ZL = 2 kΩ) Circuit Current 2 ICC2 No Signals 3.4 IF Conversion Voltage Gain CG(GV)IF at Maximum Gain, P1stIFin = −50 dBm 38 IF-SSB Noise Figure NFIF at Maximum Gain, P1stIFin = −50 dBm 8.5 Maximum 2ndIF Output PO(sat)IF at Maximum Gain, P1stIFin = −20 dBm −9.5 Gain Control Voltage VGC Voltage at Maximum Gain CGIF  Gain Control Range DGC P1stIFin = −50 dBm 20 2nd IF Amplifier (f2ndIF = 4.092 MHz, ZS = 50 Ω, ZL = 2 kΩ) Circuit Current 3 ICC3 No Signals 1.55 Voltage Gain GV P2ndIFin = −60 dBm 37 Output Power P2ndIFout P2ndIFin = −30 dBm −14.5 10.0 15.5 10.0 −2.5 5.3 41 11.5 −6.5   2.40 40 −11.5 PLL Synthesizer Block Circuit Current 4 ICC4 PLL All Block Operating 18.5 28.5 Phase Comparing Frequency Reference Input Minimum Level fPD PLL Loop VREFin ZL = 10 kΩ//20 pFNote 8.0 8.184 200  Loop Filter Output Level (H) Loop Filter Output Level (L) Reference Output Swing VLP(H) VLP(L) VREFout ZL = 10 kΩ//2 pF Note 2.8   1.0  MAX. 60.0 14.0 18.5 13.0 +0.5 7.2 44 14.5 −3.5 1.0  3.25 43 −8.5 38.5 8.4   0.4  Unit mA mA dB dB dBm mA dB dB dBm V dB mA dB dBm mA MHz mVP-P V V VP-P Note Impedance of measurement equipment Preliminary Data Sheet P14016EJ1V0DS00 5 5 Page PACKAGE DIMENSIONS 36 PIN PLASTIC QFN (UNIT: mm) 4–C0.5 6.2±0.2 6.0±0.2 Pin36 Pin1 6.2±0.2 6.0±0.2 µPB1005K 0.22±0.05 0.6±0.1 0.5±0.025 Bottom View Preliminary Data Sheet P14016EJ1V0DS00 11 11 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
UPB1003GS	REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER	NEC
UPB1003GS	REFERENCE FREQUENCY 16.368 MHz/ 2ND IF FREQUENCY 4.092 MHz RF/IF FREQUENCY DOWN-CONVERTER PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER	NEC

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