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PDF UPA1812 Data sheet ( Hoja de datos )

Número de pieza UPA1812
Descripción P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING
Fabricantes NEC 
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1812
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The µPA1812 is a switching device which can be
driven directly by a 4.0-V power source.
The µPA1812 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
8
PACKAGE DRAWING (Unit : mm)
5
1, 5, 8 : Drain
2, 3, 6, 7: Source
4 : Gate
1.2 MAX.
1.0±0.05
0.25
FEATURES
Can be driven by a 4.0-V power source
Low on-state resistance
RDS(on)1 = 39 mMAX. (VGS = –10 V, ID = –2.5 A)
RDS(on)2 = 63 mMAX. (VGS = –4.5 V, ID = –2.5 A)
RDS(on)3 = 69 mMAX. (VGS = –4.0 V, ID = –2.5 A)
14
3.15 ±0.15
3.0 ±0.1
3°
+5°
–3°
0.1±0.05
0.5
0.6
+0.15
–0.1
6.4 ±0.2
4.4 ±0.1
1.0 ±0.2
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA1812GR-9JG
Power TSSOP8
0.65 0.8 MAX.
0.27
+0.03
–0.08
0.10 M
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS –30 V
Gate to Source Voltage
VGSS
–20/+5
V
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
ID(DC)
ID(pulse)
PT
±5.0
±20
2.0
A
A
W
Channel Temperature
Tch 150 °C
Storage Temperature
Tstg –55 to +150 °C
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
0.1
Notes 1. PW 10 µs, Duty Cycle 1 %
2. Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D12967EJ1V0DS00 (1st edition)
Date Published October 1999 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1997, 1999

1 page




UPA1812 pdf
µ PA1812
1000
SWITCHING CHARACTERISTICS
VDD = 10 V
VGS(on) = 4 V
RG = 10
tr
tf
100 td(off)
td(on)
10
0.1
1
ID - Drain Current - A
10
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
100
10
1
0.1
0.01
0.001
0.0001
0.4
0.6 0.8
VF(S-D) - Source to Drain Voltage - V
1
DYNAMIC INPUT CHARACTERISTICS
10
ID = 5 A
VDD = 24 V
8
6
4
2
0 5 10 15 20 25 30 35
Qg - Gate Charge - nC
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
Mounted on ceramic
substrate of 50 cm2 x 1.1 mm
Single Pulse
100 62.5˚C/W
10
1
0.1
0.001
0.01
0.1 1 10
PW - Pulse Width - s
100 1000
Data Sheet D12967EJ1V0DS00
5

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