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Número de pieza | UPA1757 | |
Descripción | SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE | |
Fabricantes | NEC | |
Logotipo | ||
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No Preview Available ! DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1757
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
Description
This product is Dual N-Channel MOS Field Effect Transistor
designed for power management application of
notebook computers, and Li-ion battery application.
Features
• Dual MOS FET chips in small package
• 2.5 V gate drive type and low on-resistance
RDS(on)1 = 23 mΩ (MAX.) (VGS = 4.5 V, ID = 3.5 A)
RDS(on)2 = 32 mΩ (MAX.) (VGS = 2.5 V, ID = 3.5 A)
• Low Ciss Ciss = 750 pF Typ.
• Built-in G-S protection diode
• Small and surface mount package
(Power SOP8)
Ordering information
Part Number
µ PA1757G
Package
Power SOP8
Package Drawing (Unit : mm)
85
14
5.37 Max.
1 ; Source 1
2 ; Gate 1
7, 8 ; Drain 1
3 ; Source 2
4 ; Gate 2
5, 6 ; Drain 2
6.0 ±0.3
4.4
1.27 0.78 Max.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
Absolute Maximum Ratings (TA = 25 °C)
Drain to source voltage
VDSS
20 V
Gate to source voltage
VGSS
±12.0
V
Drain current (DC)
Drain current (pulse)Note1
Total power dissipation (1 unit)Note2
Total power dissipation (2 unit)Note2
ID(DC)
ID(pulse)
PT
PT
±7.0 A
±28 A
1.7 W
2.0 W
Channel temperature
Tch 150 °C
Storage temperature
Tstg −55 to +150 °C
Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 %
2. TA = 25 °C, Mounted on ceramic substrate of 2000 mm2 x 1.1 mm
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may
be applied to this device.
The information in this document is subject to change without notice.
Document No. D12910EJ2V0DS00 (2nd edition)
Date Published September 1998 NS CP (K)
Printed in Japan
© 1998
1 page µ PA1757
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
80
60
40
20
0 20 40 60 80 100 120 140 160
TA - Ambient Temperature - ˚C
100
10
FORWARD BIAS SAFE OPERATING AREA
RD(Sa(toVn)GLSim=4ite.5dV)
ID(DC)
ID(pulse)
Mounted on ceramic
substrate of
2000mm x 1.1mm21 unit
1 ms
10ms
100ms
1
TA = 25 ˚C
Power
DC
Dissipation Limited
0.1 Single Pulse
0.1 1
10
100
VDS - Drain to Source Voltage - V
FORWARD TRANSFER CHARACTERISTICS
100 Pulsed
10
TA=150˚C
125˚C
1 75˚C
0.1
TA=25˚C
-25˚C
-50˚C
VDS=10V
0 1 2 34
VGS - Gate to Source Voltage - V
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
2.8
2.4
2 unit
2.0
Mounted on ceramic
substrate of
2000mm2 x 1.1mm
1 unit
1.6
1.2
0.8
0.4
0 20 40 60 80 100 120 140 160
TA - Ambient Temperature - ˚C
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
25
VGS=4.5V
20
Pulsed
15 2.5V
10
5
0 0.2 0.4 0.6 0.8
VDS - Drain to Source Voltage - V
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet UPA1757.PDF ] |
Número de pieza | Descripción | Fabricantes |
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UPA1757 | SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE | NEC |
UPA1758 | SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE | NEC |
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