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PDF UPA1722 Data sheet ( Hoja de datos )
| Número de pieza | UPA1722 | |
| Descripción | SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1722
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The µPA1722 is N-Channel MOS Field Effect
Transistor designed for DC/DC converters and power
management applications of notebook computers.
FEATURES
• Low on-resistance
• RDS(on)1 = 21.0 mΩ MAX. (VGS = 10 V, ID = 4.5 A)
• RDS(on)2 = 29.0 mΩ MAX. (VGS = 4.5 V, ID = 4.5 A)
• RDS(on)3 = 32.0 mΩ MAX. (VGS = 4.0 V, ID = 4.5 A)
• Low Ciss: Ciss = 980 pF TYP.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
• ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA1722G
Power SOP8
PACKAGE DRAWING (Unit : mm)
85
1,2,3 ; Source
4 ; Gate
5,6,7,8 ; Drain
14
5.37 MAX.
6.0 ±0.3
4.4
0.8
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
VDSS 30 V
VGSS ±20 V
EQUIVALENT CIRCUIT
Drain Current (DC)
ID(DC) ±9 A
Drain Current (pulse) Note1
ID(pulse)
±36
A
Total Power Dissipation (TA = 25°C) Note2
PT
2.0 W
Channel Temperature
Tch 150 °C
Gate
Drain
Body
Diode
Storage Temperature
Tstg –55 to +150 °C
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
Gate
Protection
Diode
Source
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G13890EJ1V0DS00 (1st edition)
Date Published November 1999 NS CP(K)
Printed in Japan
The mark • shows major revised points.
©
1998, 1999
1 page  
µ PA1722
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
50 ID = 4.5 A
40
VGS = 4.0 V
30
4.5 V
20 10 V
10
0
−50 0
50 100 150
Tch - Channel Temperature - ˚C
10000
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
VGS = 0 V
f = 1 MHz
1000
100
Ciss
Coss
Crss
10
0.01
0.1 1 10
VDS - Drain to Source Voltage - V
100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
40
30
VDD = 24 V
15 V
20 6 V
14
VGS
12
10
8
6
10 4
2
VGS ID = 9 A
00
0 4 8 12 16 20 24 28 32
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
10
VGS = 10 V
1
0V
Pulsed
0.1
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD - Source to Drain Voltage - V
1000
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
di/dt = 100A /µs
VGS = 0 V
100
10
1
0.1
1 10
ID - Drain Current - A
100
Data Sheet G13890EJ1V0DS00
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UPA1722.PDF ] | |
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