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PDF S1M8662A Data sheet ( Hoja de datos )
| Número de pieza | S1M8662A | |
| Descripción | CDMA/PCS/GPS Triple Mode IF/ baseband IC | |
| Fabricantes | Samsung semiconductor | |
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RX IF/BBA WITH GPS
S1M8662A (Preliminary)
INTRODUCTION
S1M8662A is CDMA/PCS/GPS Triple Mode IF/ baseband IC which is
divided into three main parts - IF frequency processing, basband
processing , and digital interface. The receiver IC (S1M8662A)and
transmitter IC (S1M8657) are provided as a KIT.
S1M8662A is a receiver IC, installed with a Rx AGC, Baseband
Converter, Baseband analog filter, and A-D Converter. It can send a
digital baseband signal to the digital baseband IC.
S1M8662A is fabricated on the Samsung's 0.5um high-speed, high
frequency BICMOS processing and can achieve superior high frequency
and low power digital operations.
Its operating voltage is 2.7 to 3.3V, and operating temperature
-30 to +85°C .
32-BCC++-5.0×5.0
FEATURES
• Cellular CDMA/PCS/GPS Triple Mode
• AGC input signal range : 90dB
• QPSK Baseband Converter
• Built-in I ,Q Baseband signal extractor LPF
• Built-in 4-bit ADC for converting I and Q CDMA analog baseband signals to digital baseband signals
• Built-in VCO for baseband conversion
• Built-in Modem PDM control circuit to compensate the I and Q offsets
• Built-in TCXO output ON/OFF
• 3-Line Serial Port Interface (SPI)
• Operating Voltage : 2.7 to 3.3V
• 32BCC++(5mm * 5mm * 0.8mm) Package
ORDERING INFORMATION
Device
++ S1M8662AX01-F0T0
++ : Under Development
Package
32-BCC++-5.0×5.0
Operating Temperature
-30 to +85°C
1
1 page  
RX IF/BBA WITH GPS
S1M8662A (Preliminary)
PIN DESCRIPTION (Continued)
Pin No
24
25
26
27
28
29
30
31
32
Symbol
RXQD3
RXQD2
RXQD1
RXQD0
VDDM
RXQD3
RXQD2
RXQD1
RXQD0
I/O Description
DO Q Channel 4-bit A-D Converter's digital outputs, which are connected
to the modem data input pins. These data are synchronized at
CHIP×8's rising edge and output. Because they are valid at the falling
edge, the data are latched at the falling edge in the modem.
DI Power source for a logic circuit ,related to the digital input /output,
connected to an external digital logic such as the modem.
DO I Channel 4-bit A-D Converter's digital outputs, which are connected to
the modem data input pins. These data are synchronized at CHIP×8's
rising edge and output. Because they are valid at the falling edge, the
data are latched at the falling edge in the modem.
Table 1. S1M8660A and S1M8662A Function & Control Content Comparison
Function / Mode Control
Operation Modes
CDMA (Cellular CDMA, PCS)
AMPS (FM)
Global Positioning System (GPS)
IF AGC 90dB Range
CDMA (Cellular CDMA, PCS)
AMPS (FM)
Global Positioning System (GPS)
IF to Analog Baseband Quadrature Down-Conversion
CDMA (Cellular CDMA, PCS)
AMPS (FM)
Global Positioning System (GPS)
Low Pass Baseband I/Q Filtering with Mode Specific Performance
CDMA (Cellular CDMA, PCS)
AMPS (FM)
Global Positioning System (GPS)
4-bit I/Q Analog to Digital Converters, Parallel Outputs
CDMA (Cellular CDMA, PCS)
Global Positioning System (GPS)
8-bit I/Q Analog to Digital Converters, Serial Outputs
AMPS (FM)
Rx Slotting Operation for Saving Current Consumption
Clock Generation
TCXO/N Output
Configurable CHIPx8 as Input or Output
VCO for Generation the Rx IF LO
Analog Baseband Amplifiers with I/Q Offset Controls
S1M8660A S1M8662A
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• ∆ (N=1)
• ∆ (Input)
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RX IF/BBA WITH GPS
S1M8662A (Preliminary)
FUNCTIONAL DESCRIPTION
S1M8662A is a CDMA/GPS receive-only baseband analog IC, located between the RF mid-frequency processing
terminal and baseband processing terminal. The RF analog mid-frequency signal terminal(IF SAW filter output),
directly connected to the S1M8662A mid-frequency input pin, converts and processes the baseband signal and
sends the corresponding digital signal to the modem IC. Baseband analog processing uses QPSK modulation,
LPF, and A-D converter and the modem IC performs digital CDMA /GPS baseband modulation on the digitalized
analog baseband signal it receives. An on-chip VCO creates a multiple frequency(x2, x3, x4, x6) LO signal.
S1M8662A uses a 0.5um BiCMOS, equipped with high-frequency bipolar and low power standardized CMOS
logic, to operate safely in the low power range, consisting of power voltage between 2.7 to 3.3V and operating
temperature between -30 to +85°C.
CDMA Receive Signal Path
The receive circuit of S1M8662A has the Rx AGC, an automatic gain controller, and baseband LPF and output
terminal with the A-D converter, and VCO and mixer etc. The input signal is received as a differential signal,
which is modulated to 1.23 MHz spread-spectrum for CDMA. The mid-frequency is 220.38MHz for Korea-PCS,
1.23MHz for US-PCS, and 85.38MHz for cellular; they are set based on the time constants of the components
involved with the external VCO and external Rx PLL. Rx AGC , connected to both the IF SAW filter and
matching component in the RF-IF converter output located in the RF block, amplifies or reduces according to the
signal size. It takes its orders from the modem chip when it sets the appropriate receive level as required by the
CDMA system. Gain is controlled by applying a DC voltage to the RAGC_CONT pin. The applied DC is produced
when the PDM signal, generated as a control signal in the modem, passes through the R-C filter. The control
band of this AGC is approx. 90dB. The QPSK Baseband modulator separates and modulates the IF signal sent
by the AGC using I(In-phase) and Q(Quad-phase) baseband signal. Essentially, two signals, I-LO and Q-LO
(Local oscillator), are mixed with AGC's IF output signals, respectively. The LO(local oscillator) signal is
generated by the internal oscillating components, externally connected tank coil, and Varactor, and the externally
independent PLL device is used to generate its exact oscillation mid-frequency.
T=0
Q-CH
I-CH
Figure 4. Received I/Q Phase in S1M8662A
Defining of the I-Phase and Q-Phase receive path is very important to its design. The polarities of these paths
are also important to digital baseband modulation. Therefore, the output of the QPSK baseband modulation
determines the I and Q phases; I-phase is defined as the phase leading the Q-phase by exactly 90°, but it simpler
to think of I as Cosin and Q as Sin. The figure related to this is shown in Figure 5. This definition is valid only
when the QPSK IF input signal is higher than the IF mid-frequency. The baseband signal, output by the QPSK
modulator, includes various other unnecessary surrounding band noises, which are removed by the use of the
LPF(Low-Pass-Filter).
Ultimately, I and Q filtered signals are converted to digital signals by the 4-bit A-D converter and sent to the
modem. The A-D converter used is a parallel output type and its outputs are synchronized at the CHIP×8 rising
edge. The modem chip captures the data on the CHIP×8 falling edge. The CHIP×8 clock used in the A-D
converter received to MSM.
11
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| PDF Descargar | [ Datasheet S1M8662A.PDF ] | |
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