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PDF PCA9500D Data sheet ( Hoja de datos )
| Número de pieza | PCA9500D | |
| Descripción | 8-bit I2C and SMBus I/O port with 2-kbit EEPROM | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
PCA9500
8-bit I2C and SMBus I/O port with
2-kbit EEPROM
Product data
Supersedes data of 27 Sep 2002
2003 Jun 27
Philips
Semiconductors
1 page  
Philips Semiconductors
8-bit I2C and SMBus I/O port with 2-kbit EEPROM
Product data
PCA9500
SCL
12 345 678
SLAVE ADDRESS (I/O EXPANDER)
DATA TO PORT
SDA S 0 1 0 0 A2 A1 A0 0 A
DATA 1
START CONDITION
WRITE TO
PORT
R/W ACKNOWLEDGE
FROM SLAVE
DATA TO PORT
A DATA 2
ACKNOWLEDGE
FROM SLAVE
A
ACKNOWLEDGE
FROM SLAVE
DATA OUT
FROM PORT
t pv
Figure 6. I/O WRITE mode (output)
DATA 1 VALID
t pv
DATA 2 VALID
SW00548
SLAVE ADDRESS (I/O EXPANDER)
DATA FROM PORT
SDA
S 0 1 0 0 A2 A1 A0 1 A
DATA 1
READ FROM
PORT
START CONDITION
R/W ACKNOWLEDGE
FROM SLAVE
DATA FROM PORT
A DATA 4
ACKNOWLEDGE
FROM MASTER
1P
STOP
CONDITION
DATA INTO
PORT
DATA 1
DATA 2
t ph
DATA 3
t ps
DATA 4
Figure 7. I/O READ mode (input)
SW00549
Quasi-bidirectional I/Os (see Figure 8)
A quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data direction. At power-on the I/Os are HIGH.
In this mode, only a current source to VDD is active. An additional strong pull-up to VDD allows fast rising edges into heavily loaded outputs.
2003 Jun 27
5
5 Page 
Philips Semiconductors
8-bit I2C and SMBus I/O port with 2-kbit EEPROM
Product data
PCA9500
TYPICAL APPLICATION
Applications
• Board version tracking and configuration
• Board health monitoring and status reporting
• Multi-card systems in Telecom, Networking, and Base Station
Infrastructure Equipment
• Field recall and troubleshooting functions for installed boards
UP TO 8 CARDS
• General-purpose integrated I/O with memory
• Drop in replacement for PCF8574 with integrated 2-kbit EEPROM
• Bus master sees GPIO and EEPROM as two separate devices
• Three hardware address pins allow up to 8 PCA9500s to be
located in the same I2C/SMBus
CPU
OR
µC
I2C
I2C
I2C
I2C
I2C
ASIC
CONFIGURATION CONTROL
PCA9500
CONTROL
INPUTS
I2C
GPIO
ALARM
EEPROM
MONITORING
AND
CONTROL
LEDs
CARD ID, SUBROUTINES, CONFIGURATION DATA, OR REVISION HISTORY
Figure 18. Typical application
SW02003
A central processor/controller typically located on the system main
board can use the 400 kHz I2C/SMBus to poll the PCA9500 devices
located on the system cards for status or version control type of
information. The PCA9500 may be programmed at manufacturing to
store information regarding board build, firmware version,
manufacturer identification, configuration option data… Alternately,
these devices can be used as convenient interface for board
configuration, thereby utilizing the I2C/SMBus as an intra-system
communication bus.
2003 Jun 27
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet PCA9500D.PDF ] | |
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