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PDF IDT7M1014 Data sheet ( Hoja de datos )

Número de pieza IDT7M1014
Descripción 4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



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Integrated Device Technology, Inc.
4K x 36
BiCMOS DUAL-PORT
STATIC RAM MODULE
IDT7M1014
FEATURES
• High-density 4K x 36 BiCMOS Dual-Port Static RAM
module
• Fast access times
— Commercial: 15, 20ns
— Military: 25, 30ns
• Fully asynchronous read/write operation from either port
• Surface mounted LCC packages allow through-hole
module to fit on a ceramic PGA footprint
• Single 5V (±10%) power supply
• Multiple GND pins and decoupling capacitors for maxi-
mum noise immunity
• Inputs/outputs directly TTL-compatible
DESCRIPTION
The IDT7M1014 is a 4K x 36 asynchronous high-speed
BiCMOS Dual-Port static RAM module constructed on a co-
fired ceramic substrate using 4 IDT7014 (4K x 9) asynchro-
nous Dual-Port RAMs. The IDT7M1014 module is designed
to be used as stand-alone 36-bit dual-port RAM.
This module provides two independent ports with separate
control, address, and I/O pins that permit independent and
asynchronous access for reads or writes to any location in
memory.
The IDT7M1014 module is packaged in a 142-lead ceramic
PGA (Pin Grid Array). Maximum access times as fast as 15ns
and 25ns are available over the commercial and military
temperature ranges respectively.
All IDT military modules are constructed with semiconduc-
tor components manufactured in compliance with the latest
revision of MIL-STD-883, Class B making them ideally suited
to applications demanding the highest level of performance
and reliability.
FUNCTIONAL BLOCK DIAGRAM
L_A0 – 11
L_I/O0 – 8
L_OEL
L_R/W0
L_I/O9 – 17
L_R/W1
L_I/O18 – 26
L_OEH
L_R/W2
L_I/O27 – 35
L_R/W3
IDT7014
4K x 9
IDT7014
4K x 9
IDT7014
4K x 9
IDT7014
4K x 9
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
7.03
R_A0 – 11
R_I/O0 – 8
R_OEL
R_R/W0
R_I/O9 – 17
R_R/W1
R_I/O18 – 26
R_OEH
R_R/W2
R_I/O27 – 35
R_R/W3
2819 drw 01
DECEMBER 1995
DSC-2819/4
1

1 page




IDT7M1014 pdf
IDT7M1014 4K x 36 BiCMOS
DUAL-PORT STATIC RAM MODULE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(VCC = 5V ± 10%, TA = –55°C to +125°C or 0°C to +70°C)
7M1014SxxG
-15 -20
Symbol Parameter
Read Cycle
Min. Max. Min. Max.
7M1014SxxGB
-25 -30
Min. Max. Min. Max.
Unit
tRC Read Cycle Time
15 — 20
— 25 —
tAA Address Access Time
— 15 —
20 — 25
tOE Output Enable Access Time
— 8 — 10 — 12
tOH Output Hold from Address Change
3 —3
—3—
tOLZ(1) Output Enable to Output in Low-Z
0 —0
—0—
tOHZ(1) Output Disable to Output in Hi-Z
— 7—
9 — 11
Write Cycle
tWC Write Cycle Time
15 — 20
— 25 —
tAW Address Valid to End of Write
14 — 15
— 20 —
tAS Address Set-Up Time
0 —0
—0—
tWP Write Pulse Width
12 — 15
— 20 —
tWR Write Recovery Time
1 —2
—2—
tDW Data Valid to End of Write
10 — 12
— 15 —
tDH Data Hold Time
0 —0
—0—
tWHZ(1) Write Enable to Output in Hi-Z
— 7—
9 — 11
tOW(1)
Output Active from End of Write
0 —0
—0—
tWDD
Write Pulse to Data Delay
— 30 —
40 — 45
tDDD(1) Write Data Valid to Read Data Delay — 25 —
30 — 35
NOTES:
1. This parameter is guaranteed by design but not tested.
2. Port-to-Port delay through the RAM cells from the writing port to the reading port.
30 — ns
— 30 ns
— 15 ns
3 — ns
0 — ns
— 13 ns
30 — ns
25 — ns
0 — ns
25 — ns
2 — ns
20 — ns
0 — ns
— 13 ns
0 — ns
— 50 ns
— 40 ns
2819 tbl 09
TIMING WAVEFORM OF READ CYCLE NO. 1 (EITHER SIDE) (1,2)
ADDRESS
DATAOUT
tRC
tAA
tOH
NOTES:
1. R/W is HIGH for Read Cycles.
2. OE VIL.
7.03
tOH
2819 drw 05
5

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