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PDF IDT79R3051E-20MJ Data sheet ( Hoja de datos )

Número de pieza IDT79R3051E-20MJ
Descripción RISControllers
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



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No Preview Available ! IDT79R3051E-20MJ Hoja de datos, Descripción, Manual

Integrated Device Technology, Inc.
IDT79R3051/79R3052
RISControllers
IDT79R3051, 79R3051E
IDT79R3052, 79R3052E
FEATURES:
• Instruction set compatible with IDT79R3000A and
IDT79R3001 MIPS RISC CPUs
• High level of integration minimizes system cost, power
consumption
— IDT79R3000A /IDT79R3001 RISC Integer CPU
— R3051 features 4KB of Instruction Cache
— R3052 features 8KB of Instruction Cache
— All devices feature 2kB of Data Cache
— “E” Versions (Extended Architecture) feature full
function Memory Management Unit, including 64-
entry Translation Lookaside Buffer (TLB)
— 4-deep write buffer eliminates memory write stalls
— 4-deep read buffer supports burst refill from slow
memory devices
— On-chip DMA arbiter
— Bus Interface minimizes design complexity
• Single clock input with 40%-60% duty cycle
• 35 MIPS, over 64,000 Dhrystones at 40MHz
• Low-cost 84-pin PLCC packaging that's pin-/package-
compatible with thermally enhanced 84-pin MQUAD.
• Flexible bus interface allows simple, low-cost designs
• 20, 25, 33, and 40MHz operation
• Complete software support
— Optimizing compilers
— Real-time operating systems
— Monitors/debuggers
— Floating Point Software
— Page Description Languages
Clk2xIn
Int(5:0)
Clock
Generator
Unit
Master Pipeline Control
BrCond(3:0)
System Control
Coprocessor
Integer
CPU Core
Exception/Control
Registers
General Registers
(32 x 32)
Memory Management
Registers
ALU
Shifter
Translation
Lookaside Buffer
(64 entries)
Mult/Div Unit
Address Adder
PC Control
Virtual Address
32
Physical Address Bus
Instruction
Cache
(8kB/4kB)
Data
Cache
(2kB)
4-deep
Write
Buffer
Data Bus
Bus Interface Unit
4-deep
Read
Buffer
DMA
Arbiter
BIU
Control
32
Address/
Data
DMA Rd/Wr SysClk
Ctrl Ctrl
Figure 1. R3051 Family Block Diagram
2874 drw 01
The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, R3720, R4400 and R4600 are trademarks of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1995 Integrated Device Technology, Inc.
5.3
SEPTEMBER 1995
DSC-3000/5
1

1 page




IDT79R3051E-20MJ pdf
IDT79R3051/79R3052 INTEGRATED RISControllers
COMMERCIAL TEMPERATURE RANGE
• Sable, an instruction set simulator.
• Optimizing compilers from MIPS, the acknowledged leader
in optimizing compiler technology.
• IDT Cross development tools, available in a variety of
development environments.
• The high-performance IDT floating point library software,
which has been integrated into the compiler toolchain to
allow software floating point to replace hardware floating
point without modifying the original source code.
• The IDT Evaluation Board, which includes RAM, EPROM,
I/O, and the IDT Prom Monitor.
• The IDT Laser Printer System board, which directly drives
a low-cost print engine, and runs Microsoft TrueImage
Page Description Language on top of PeerlessPageAd-
vanced Printer Controller BIOS.
• Adobe PostScriptPage Description Language, ported to
the R3000 instruction set, runs on the IDT79R3051 family.
• The IDT Prom Monitor, which implements a full prom
monitor (diagnostics, remote debug support, peek/poke,
etc.).
• An In-Circuit Emulator, developed and sold by Embedded
Performance, Inc.
Reset
Clk2xIn
Int(5:0)
BrCond(3:0)
IDT R3051 Family
RISController
BusReq
BusGnt
Burst/
Wr RdCEn WrNear
AD(31:0) ALE Addr(3:2) SysClk Rd Ack DataEn BErr
FCT373T
DRAM Control
PALs
DRAM
FCT245T
Memory and Interface
Control PALs
Address
Decode
PAL
EPROM
I/O Devices/
Peripherals
Figure 5. Typical R3051 Family Based System
5.3
System I/O
2874 drw 05
5

5 Page





IDT79R3051E-20MJ arduino
IDT79R3051/79R3052 INTEGRATED RISControllers
COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1, 3)
Symbol
VTERM
TC
TBIAS
TSTG
VIN
Rating
Terminal Voltage
with Respect
to GND
Operating Case
Temperature
Temperature
Under Bias
Storage
Temperature
Input Voltage
Commercial
–0.5 to +7.0
0 to +85
–55 to +125
–55 to +125
–0.5 to +7.0
RECOMMENDED OPERATING
Unit TEMPERATURE AND SUPPLY VOLTAGE
V Grade
Temperature
GND
VCC
Commercial 0°C to +85°C
0V 5.0 ±5%
(Case)
°C 2874 tbl 06
°C
°C OUTPUT LOADING FOR AC TESTING
V +4mA
NOTES:
2874 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. VIN minimum = –3.0V for pulse width less than 15ns.
VIN should not exceed VCC +0.5V.
3. Not more than one output should be shorted at a time. Duration of the short
should not exceed 30 seconds.
VREF
+1.5V
+
AC TEST CONDITIONS
–4mA
To Device
Under Test
25pF
2874 drw 08
Symbol
Parameter
Min. Max. Unit
VIH
Input HIGH Voltage
3.0
V
VIL
Input LOW Voltage
0
V
VIHS
Input HIGH Voltage
3.5
V
VILS Input LOW Voltage —
0V
2874 tbl 05
DC ELECTRICAL CHARACTERISTICS (TC = 0°C to +85°C, VCC = +5.0V ±5%)
20MHz
25MHz 33.33MHz
40MHz
Symbol Parameter
Test Conditions
Min. Max. Min. Max. Min. Max. Min. Max. Unit
VOH Output HIGH Voltage
VCC = Min., IOH = –4mA
3.5 — 3.5 — 3.5 — 3.5 — V
VOL
VIH
VIL
VIHS
VILS
CIN
COUT
Output LOW Voltage
Input HIGH Voltage(3)
Input LOW Voltage(1)
Input HIGH Voltage(2,3)
Input LOW Voltage(1,2)
Input Capacitance(4)
Output Capacitance(4)
VCC = Min., IOL = 4mA
— 0.4 — 0.4 — 0.4 — 0.4 V
2.0 — 2.0 — 2.0 — 2.0 — V
— 0.8 — 0.8 — 0.8 — 0.8 V
3.0 — 3.0 — 3.0 — 3.0 — V
— 0.4 — 0.4 — 0.4 — 0.4 V
— 10 — 10 — 10 — 10 pF
— 10 — 10 — 10 — 10 pF
ICC Operating Current
VCC = 5V, TC = 25°C
— 350 — 400 — 450 — 500 mA
IIH Input HIGH Leakage
VIH = VCC
— 100 — 100 — 100 — 100 µA
IIL Input LOW Leakage
VIL = GND
–100 — –100 — –100 — –100 — µA
IOZ
Output Tri-state Leakage VOH = 2.4V, VOL = 0.5V
–100 100 –100
NOTES:
1. VIL Min. = –3.0V for pulse width less than 15ns. VIL should not fall below –0.5V for larger periods.
2. VIHS and VILS apply to CIk2xIn and Reset.
3. VIH should not be held above VCC + 0.5V.
4. Guaranteed by design.
100 –100
100 –100
100 µA
2874 tbl 07
5.3 11

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