DataSheet.es    


PDF IDT77V107L25PF Data sheet ( Hoja de datos )

Número de pieza IDT77V107L25PF
Descripción Single ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



Hay una vista previa y un enlace de descarga de IDT77V107L25PF (archivo pdf) en la parte inferior de esta página.


Total 24 Páginas

No Preview Available ! IDT77V107L25PF Hoja de datos, Descripción, Manual

Single ATM PHY for 25.6 and
51.2 Mbps with Utopia Level 2
IDT77V107
Features List
! Performs the PHY-Transmission Convergence (TC) and
Physical Media Dependent (PMD) Sublayer functions of the
Physical Layer
! Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5
specifications for 25.6 Mbps physical interface
! Also operates at 51.2Mbps
! 8-bit Utopia Level 2 Interface
! 3-Cell Transmit & Receive FIFOs
! Receiver Auto-Synchronization and Good Signal Indication
! Supports UTP Category 3 physical media
! Interfaces to standard magnetics
! Low-Power CMOS
! 3.3V supply with 5V tolerant inputs
! 100-lead TQFP Package (14 x 14 mm)
! Commercial and Industrial temperature ranges
Description
The IDT77V107 is a member of IDT's family of products supporting
Asynchronous Transfer Mode (ATM) data communications and
networking. The IDT77V107 implements the physical layer for 25.6
Mbps ATM, connecting a serial copper link (UTP Category 3) to an ATM
layer device such as a SAR or a switch ASIC. The IDT77V107 also
operates at 51.2 Mbps and is well suited to backplane driving applica-
tions. The 77V107 has an 8-bit UTOPIA Level 2 interface on the cell
side.
The IDT77V107 is fabricated using IDT's state-of-the-art CMOS tech-
nology, providing the highest levels of integration, performance and reli-
ability, with the low-power consumption characteristics of CMOS.
77V107 Overview
The 77V107 is a physical layer interface chip for 25.6Mbps ATM
network communications as defined by ATM Forum document af-phy-
040.000 and ITU-T I.432.5. The physical layer is divided into a Physical
Media Dependent sub layer (PMD) and Transmission Convergence (TC)
sub layer. It is based on the 77V106.
The PMD sub layer includes the functions for the transmitter, receiver
and clock recovery for operation across 100 meters of category 3
unshielded twisted pair (UTP) cable. This is referred to as the Line Side
Interface.
The TC sub layer defines the line coding, scrambling, data framing
and synchronization. Transmitted cells are first scrambled, then pass
through a 4b5b encoder and are finally NRZI encoded. In the 4b5b
encoder, 4-bit nibbles are converted to 5-bit symbols via a look-up table.
In addition to the 16 valid data symbols, a 17th symbol is used for a
special escape (X) symbol. This symbol has the property of being
Functional Block Diagram
TxREF
TxAddr[4:0]
TxCLK
TxDATA
TxSOC
TxEN
TXCLAV
9
ALE
WR
RD
CS
AD[7:0]
INT
RESET
8
3 CELL FIFO
UTILITY
BUS
CONTROLLER
RxAddr[4:0]
RxCLK
RxDATA
RxSOC
RxEN
RXCLAV
RxREF
M1, M0
9
3 CELL FIFO
MODE SELECT
2001 Integrated Device Technology, Inc.
TxLED
SCRAMBLER
PRNG
4B/5B
ENCODER
P/S
NRZI
Line
Driver
TXD+
TXD-
RESET
LOOP BACK
DESCRAMBLER
5B/4B
DECODER
S/P
DNRZI
RxLED
1 of 24
77V107
CLK
REC
Line
RxVR
RxD+
RxD-
OSC
5362 drw 01
July 3, 2001
DSC 5362/2

1 page




IDT77V107L25PF pdf
IDT77V107
Functional Description
Transmission convergence (TC) sub layer
Introduction
The TC sub layer defines the line coding, scrambling, data framing
and synchronization. Under control of a switch interface or Segmenta-
tion and Reassembly (SAR) unit, the 25.6Mbps ATM PHY accepts a 53-
byte ATM cell, scrambles the data, appends a command byte to the
beginning of the cell, and encodes the entire 53 bytes before transmis-
sion. These data transformations ensure that the signal is evenly distrib-
uted across the frequency spectrum. In addition, the serialized bit
stream is NRZI coded. An 8kHz timing sync pulse may be used for
isochronous communications.
Data Structure and Framing
Each 53-byte ATM cell is preceded with a command byte. This byte
is distinguished by an escape symbol followed by one of 17 encoded
symbols. Together, this byte forms one of seventeen possible command
bytes. Three command bytes are defined:
1. X_X (read: 'escape' symbol followed by another 'escape'): Start-
of-cell with scrambler/descrambler reset.
2. X_4 ('escape' followed by '4'): Start-of-cell without scrambler/
descrambler reset.
3. X_8 ('escape' followed by '8'): 8kHz timing marker. This
command byte is generated when the 8kHz sync pulse is
detected, and has priority over all line activity (data or command
bytes). It is transmitted immediately when the sync pulse is
detected. When this occurs during a cell transmission, the data
transfer is temporarily interrupted on an octet boundary, and the
X_8 command byte is inserted. This condition is the only allowed
interrupt in an otherwise contiguous transfer.
Below is an illustration of the cell structure and command byte usage:
{X_X} {53-byte ATM cell} {X_4} {53-byte ATM {X_8} cell} ...
In the above example, the first ATM cell is preceded by the X_X start-
of-cell command byte which resets both the transmitter-scrambler and
receiver-descrambler pseudo-random nibble generators (PRNG) to their
initial states. The following cell illustrates the insertion of a start-of-cell
command without scrambler/descrambler reset. During this cell's trans-
mission, an 8kHz timing sync pulse triggers insertion of the X_8 8kHz
timing marker command byte.
UTOPIA
Interface
3 Cells
PHY-ATM
Interface
Control,
HEC Gen. &
Insertion
Start of Cell
4
Scrambler
4
4
Scramble
Nibble
PRNG
Next
Command
Byte
Insertion
4
TxRef (8kHz)
Reset
4b/5b
Encoding
1
Line Rate
Clock
NRZI
Encoding
Figure 2 TC Transmit Block Diagram
Tx +
Tx -
5362 drw 05
.
5 of 24
July 3, 2001

5 Page





IDT77V107L25PF arduino
IDT77V107
polling:
RxCLK
RxADDR[4:0]
RxCLAV
RxEN
RxData[7:0],
RxPARITY
RxSOC
polling
selection
polling
N+3 1F
N+2 1F N+1
N+3
High-Z
N+2
1F N+1
N+1
1F
N+1
N
1F
P47 P48
undefined
High-Z
High-Z
H1 H2
.
cell transmission to:
PHY N+3
PHY N+1
77v1054 drw 13
Figure 9 Utopia Receive Handshake - Delay Between Cells
polling:
RxCLK
RxADDR[4:0]
RxCLAV
RxEN
RxData[7:0],
RxPARITY
RxSOC
polling
re-selection
polling
N+3
1F N+2
N+3
High-Z
1F M
N+2
1F N+1
M
1F N+2
N+1
P28 P29 P30
High-Z
High-Z
P31 P32 P33
cell transmission from:
PHY M
PHY M
Figure 10 Utopia 2 Receive Handshake - Suspended Transfer of Data
11 of 24
.77v1054 drw 14
July 3, 2001

11 Page







PáginasTotal 24 Páginas
PDF Descargar[ Datasheet IDT77V107L25PF.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
IDT77V107L25PFSingle ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2Integrated Device
Integrated Device
IDT77V107L25PFISingle ATM PHY for 25.6 and 51.2 Mbps with Utopia Level 2Integrated Device
Integrated Device

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar