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PDF IDT74FST163214PF Data sheet ( Hoja de datos )

Número de pieza IDT74FST163214PF
Descripción 12-BIT 3:1 MUX/DEMUX SWITCH
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



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12-BIT 3:1 MUX/DEMUX
SWITCH
IDT74FST163214
ADVANCE INFORMATION
Integrated Device Technology, Inc.
FEATURES:
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance:
FST163xxx – 4
• TTL-compatible input and output levels
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in SSOP, TSSOP and TVSOP
DESCRIPTION:
The FST163214 belong to IDT's family of Bus switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of
their own while providing a low resistance path for an external
driver. These devices connect input and output ports through
an n-channel FET. When the gate-to-source junction of this
FET is adequately forward-biased the device conducts and
the resistance between input and output ports is small. With-
out adequate bias on the gate-to-source junction of the FET,
the FET is turned off, therefore with no VCC applied, the device
has hot insertion capability.
The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.
The FST163214 provides a 12-bit TTL- compatible A port
and three 12-bit TTL compatible B ports. The S0-2 pins
provide mux select and disable control. The A port can be
connected to any one of the three B ports by selecting
appropriate S0-2 states.
FUNCTIONAL BLOCK DIAGRAM
1 of 12 Channels
1A1
1B1
1B3
1B2
PIN DESCRIPTION
Pin Names
A1
B1, B2, B3
S0-2
I/O
I/O
I/O
I
Description
Bus A1
Buses B1, B2, B3
Select Lines
3209 tbl 01
Flow Control
S0
S1
S2
3209 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
1
AUGUST 1996
DSC-3509/1

1 page




IDT74FST163214PF pdf
IDT74FST163214
12-BIT 3:1 MUX/DEMUX SWITCH
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
VIN
Pulse
Generator
D.U.T.
RT
VOUT
50pF
CL
500
500
7.0V
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
DEFINITIONS:
3209 lnk 08
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
3209 lnk 03
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
tSU tH
3V
1.5V
0V
3V
LOW-HIGH-LOW
PULSE
1.5V
INPUT
ASYNCHRONOUS CONTROL
PRESET
tREM
1.5V
0V
3V
tW
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
tH
3V
1.5V
0V
3209 lnk 05
ETC.
3209 lnk 04
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
3209 lnk 06
ENABLE
DISABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3V
1.5V
0V
tPLZ
3.5V
3.5V
1.5V
tPHZ
0.3V VOL
1.5V
0.3V VOH
0V 0V
NOTES:
3209 lnk 07
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
5

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