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PDF IDT74FST163213PF Data sheet ( Hoja de datos )

Número de pieza IDT74FST163213PF
Descripción 24-BIT BUS EXCHANGE SWITCH
Fabricantes Integrated Device 
Logotipo Integrated Device Logotipo



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24-BIT BUS EXCHANGE
SWITCH
IDT74FST163213
PRODUCT PREVIEW
Integrated Device Technology, Inc.
FEATURES:
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance:
FST163xxx – 4
• TTL-compatible input and output levels
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in SSOP, TSSOP and TVSOP
DESCRIPTION:
The FST163213 belongs to IDT's family of Bus switches.
Bus switch devices perform the function of connecting or
isolating two ports without providing any inherent current sink
or source capability. Thus they generate little or no noise of
their own while providing a low resistance path for an external
driver. These devices connect input and output ports through
an n-channel FET. When ther gate-to-source junction of this
FET is adequately forward-biased the device conducts and
the resistance between input and output ports is small. With-
out adequate bias on the gate-to-source junction of the FET,
the FET is turned off, therefore with no VCC applied, the device
has hot insertion capability.
The low on-resistance and simplicity of the connection
between input and output ports reduces the delay in this path
to close to zero.
The FST163213 provides four 12-bit TTL-compatible ports
that support 2 way bus exchange. The S0-2 pins control the
bus exchange and switch enable functions.
FUNCTIONAL BLOCK DIAGRAM
1 of 12 Channels
1A1 1B1
1A2 1B2
Flow Control
S0
S1
S2 3684 drw 01
PIN DESCRIPTION
Pin Names
A1, A2
B1, B2
S0-2
I/O Description
I/O Buses A1, A2, B1, B2
I Control Pins for Mux and Switch
Enable Functions
3684 tbl 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1997 Integrated Device Technology, Inc.
1
FEBRUARY 1997
DSC-3684/-

1 page




IDT74FST163213PF pdf
DT74FST163213
24-BIT BUS EXCHANGE SWITCH
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V CC
VIN
Pulse
Generator
D.U.T.
RT
V OUT
50pF
CL
500
500
7.0V
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
DEFINITIONS:
3684 lnk 08
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
3684 drw 03
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
tSU
tH
tREM
tH
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3684 drw 04
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
1.5V
tW
1.5V
3684 drw 05
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
3684 drw 06
ENABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
CLOSED
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
DISABLE
tPLZ
3.5V
1.5V
0.3V
tPHZ
1.5V
0V
0.3V
3V
1.5V
0V
3.5V
VOL
VOH
0V
3684 drw 07
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
5

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