|
|
PDF PC87310 Data sheet ( Hoja de datos )
| Número de pieza | PC87310 | |
| Descripción | PC87310 (SuperI/OTM) Dual UART with Floppy Disk Controller and Parallel Port | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PC87310 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
August 1990
PC87310 (SuperI OTM)
Dual UART with Floppy Disk Controller
and Parallel Port
General Description
The PC87310 incorporates two full function UARTs a flop-
py disk controller (FDC) with analog data separator one
parallel port game port decode hard disk controller de-
code standard XT AT address decoding for on-chip func-
tions and a Configuration Register in one chip Thus it of-
fers a single chip solution to the most commonly used
IBM PC XT and AT peripherals The floppy disk controller
is fully compatible with the industry standard 765 architec-
ture but it includes many more advanced options such as a
high performance data separator extended track range to
4096 implied seek command scan command and both
standard IBM formats as well as ISO 3 5 formats The
UARTs are compatible with either the INS8250N-B or the
NS16450 The parallel port hard disk select and game port
select logic maintain complete compatibility with the IBM XT
and AT Hardware selects XT or AT compatibility
The Configuration Register is one byte wide and can be
programmed via hardware or software Through its control
the user can assign standard AT addresses and disable any
major on-chip function (e g the FDC either UART or the
parallel port) independently of the others This allows for
flexibility in system configuration when adapter cards con-
tain duplicate functions
Features
Y 100% compatible to the IBM PC XT and AT
architectures
Y Software compatible to the INS8250N-B INS8250A and
NS16450 UARTs
Y 100% compatible to the industry standard 765A
architecture
Y On-chip analog data separator operates up to 1 Mb s
Y Implements all DP8473 Floppy Disk Controller functions
Y Bidirectional parallel port for printer or scanner opera-
tion Provides all standard Centronics and IBM PC XT
and AT interface signals
Y Decoding and chip selects for an IDE hard disk
interface
Y Address decoding and strobe generation for a game
port
Y Fabricated in NSC’s 1 5 m M2CMOS process
Y Low power CMOS with a power down mode
Y 100-pin EIAJ plastic flatpak package
Y Integrates all PC-XT PC-AT logic
On chip 24 MHz crystal oscillator
DMA enable logic
IBM compatible address decode of A0 – A9
24 mA mP bus interface buffers
40 mA floppy drive interface buffers
Data rate and drive control registers
Y Precision analog data separator
Self-calibrating PLL and delay line
Automatically chooses one of three filters
Intelligent read algorithm
Y Two pin programmable precompensation modes
Y Other enhancements
Implied seek up to 4000 tracks
IBM or ISO formatting
Y Separate interrupt request lines for the parallel and se-
rial ports
Y Adds or deletes standard asynchronous communication
bits (start parity and stop) to or from the serial data
Y Independently controlled transmit receive line status
and data set interrupts
Y Programmable baud generators for each UART channel
divide the input clock by 1 to (216 b 1) and generate
the internal 16 c sample clock
Y MODEM control functions for each UART channel
(CTS RTS DSR DTR RI and DCD)
Y Fully programmable serial-interface characteristics
5 6 7 or 8 bit characters
Even odd or no parity generation and detection
1 1 or 2 stop bit generation
Y High current drive capability for the parallel port
Note This part is patented
TRI-STATE is a registered trademark of National Semiconductor Corporation
Plus-2TM and SuperI OTM are trademarks of National Semiconductor Corporation
IBM PC-XT PC-AT and PS 2 are registered trademarks of International Business Machines Corporation
C1995 National Semiconductor Corporation TL C 10591
RRD-B30M65 Printed in U S A
1 page  
1 0 Block Diagram (Continued)
1 2 BLOCK DIAGRAM OF THE FLOPPY DISK CONTROLLER
Note 1 See Figure 3 for filter description
5
TL C 10591 – 4
5 Page 
2 0 Pin Descriptions (Continued)
Pin Symbol
SLCT (Select)
Pin Number
29
SLIN (Select Input)
37
SOUT1 2
(Serial Output)
STB (Data Strobe)
57 41
33
STEP
TC (Terminal Count)
TRK0 (Track 0)
VDD A B C D (Power)
VSS A B C D E F
(Ground)
WDATA (Write Data)
WGATE (Write Gate)
87
71
97
81 74 45 34
77 100 65
59 27 89
90
86
WPROT (Write Protect)
WR (Write)
XTSEL (XT Select)
99
14
18
Description
This input is set high by the printer when it is selected
This output selects the printer when it is low This pin will be in a
TRI-STATE condition 10 ns after a zero is loaded into the corresponding
Control Register bit position The system should pull this pin high using a
4 7 kX resistor
This output sends composite serial data output to the communications
link (peripheral MODEM or data set) The SOUT signal is set to the
Marking (logic 1) state upon a Master Reset operation (See BOUT1 2
and CRB0 7 for further information on these pins )
This output indicates to the peripheral that the data at the parallel port is
valid This pin will be in a TRI-STATE condition 10 ns after a zero is
loaded into the corresponding Control Register bit position The system
should pull this pin high using a 4 7 kX resistor
This active low open drain high drive output will produce a pulse at a
software programmable rate to move the head during a seek operation
Active high input to indicate the termination of a DMA transfer This
signal is enabled when the DMA Acknowledge pin is active
This active low Schmitt input tells the controller that the head is at track
zero of the selected disk drive
a5V Supply to the FDC analog FDC digital serial ports and parallel
port circuitry respectively
0V Reference for the FDC analog FDC digital CPU interface serial
ports parallel port and disk interface output drive circuitry respectively
This is the active low open drain write precompensated serial data to be
written onto the selected disk drive This is a high drive open drain
output
This active low open drain high drive output enables the write circuitry of
the selected disk drive This output has been designed to prevent
glitches during power up and power down This prevents writing to the
disk when power is cycled
This active low Schmitt input indicates that the disk is write protected
Any command that writes to that disk drive is inhibited when a disk is
write protected
When this input is low while the chip is selected the CPU can write
control words or data into the selected register
When this input is low during reset the chip will operate in the XT
compatible mode When this input is high during reset this chip will
operate in the AT compatible mode This pin must always have a pull
down or pull up resistor attached to it (See GPEN and GRD for further
information on this pin )
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PC87310.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PC87310 | PC87310 (SuperI/OTM) Dual UART with Floppy Disk Controller and Parallel Port | National Semiconductor |
| PC87311 | PC87311A/PC87312 (SuperI/OTM II/III) Floppy Disk Controller with Dual UARTs/ Parallel Port/ and IDE Interface | National Semiconductor |
| PC87311A | Floppy Disk Controller | National Semiconductor |
| PC87311AVF | Floppy Disk Controller | National Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |