PDF PC66-222-620 Data sheet ( Hoja de datos )

Número de pieza	PC66-222-620
Descripción	3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
Fabricantes	Siemens Semiconductor Group
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No Preview Available ! 3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module HYS64(72)V4200GU HYS64(72)V8220GU PC66 & PC100 168 pin unbuffered DIMM Modules • 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications • One bank 4M x 64, 4Mx72 and two bank 8M x 64, 8M x 72 organisation • Optimized for byte-write non-parity and ECC applications • JEDEC standard Synchronous DRAMs (SDRAM) • Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification • SDRAM Performance: fCK Clock frequency (max.) tAC Clock access time • Programmed Latencies : -8 -8B -10 100 100 66 66 8 Units MHz ns Product Speed -8 PC100 -8B PC100 -10 PC66 CL 2 3 2 tRCD 2 2 2 tRP 2 3 2 • Single +3.3V(± 0.3V ) power supply • Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave) • Auto Refresh (CBR) and Self Refresh • Decoupling capacitors mounted on substrate • All inputs, outputs are LVTTL compatible • Serial Presence Detect with E2PROM • Utilizes 4M x16 SDRAMs in TSOPII-54 packages • 4096 refresh cycles every 64 ms • 133,35 mm x 29,31 mm x 4,00 mm card size with gold contact pads Semiconductor Group 1 8.98 1 page HYS64(72)V4200/8220GU SDRAM-Modules CS0 CS1 DQMB0 DQ(7:0) DQMB1 DQ(15:8) CS CS LDQM LDQM DQ0-DQ7 DQ0-DQ7 DQMB4 DQ(39:32) UDQM UDQM DQMB5 DQ8-DQ15 DQ8-DQ15 DQ(47:40) D0 D4 CS CS LDQM DQ0-DQ7 UDQM LDQM DQ0-DQ7 UDQM DQ8-DQ15 DQ8-DQ15 D2 D6 CB(7:0) Vcc CS2 CS3 DQMB2 DQ(23:16) DQMB3 DQ(31:24) A0-A11, BA0, BA1 VCC VSS CS CS LDQM DQ0-DQ7 UDQM LDQM DQ0-DQ7 UDQM DQ8-DQ15 DQ8-DQ15 D8 D9 Vcc CS CS CS CS LDQM LDQM DQ0-DQ7 DQ0-DQ7 DQMB6 DQ(55:48) LDQM LDQM DQ0-DQ7 DQ0-DQ7 UDQM UDQM DQMB7 UDQM UDQM DQ8-DQ15 DQ8-DQ15 DQ(63:56) D1 D5 DQ8-DQ15 DQ8-DQ15 D3 D7 E2PROM (256wordx8bit) D0 - D7, (D8,D9) D0 - D7, (D8,D9) C D0 - D7, (D8,D9) SA0 SA1 SA0 SA1 SDA SA2 SA2 WP SCL SCL 47k RAS, CAS, WE CKE0 CKE1 VDD 10k D0 - D7, (D8,D9) D0 - D3, (D8) D4 - D7,(D9) Clock Wiring 8M x 64 8M x 72 CLK0 2 SDRAM+15pF CLK1 2 SDRAM+15pF CLK2 2 SDRAM+15pF CLK3 2 SDRAM+15pF 3 SDRAM+10pF 3 SDRAM+10pF 2 SDRAM+15pF 2 SDRAM+15pF notes: 1) all resistors are 10 Ohms 2) D8 & D9 are only used in the x72 ECC version 3) DIMM may combine bytes 0 with 4, 1 with 5, 2 with 6 and 3 with 7 to obtain most advantagous board layout to obtain minimum DQ trance length Semiconductor Group 5 5 Page HYS64(72)V4200/8220GU SDRAM-Modules A serial presence detect storage device - E2PROM - is assembled onto the module. Information about the module configuration, speed, etc. is written into the E2PROM device during module production using a serial presence detect protocol ( I2C synchronous 2-wire bus) SPD-Table for PC100 modules: Byte# Description 0 Number of SPD bytes 1 Total bytes in Serial PD 2 Memory Type 3 Number of Row Addresses (wit- hout BS bits) 4 Number of Column Addresses (for 16 SDRAM) 5 Number of DIMM Banks 6 Module Data Width 7 Module Data Width (cont’d) 8 Module Interface Levels 9 SDRAM Cycle Time at CL=3 10 SDRAM Access time from Clock at CL=3 11 Dimm Config (Error Det/Corr.) 12 Refresh Rate/Type 13 SDRAM width, Primary 14 Error Checking SDRAM data width 15 Minimum clock delay for back-to- back random column address 16 Burst Length supported 17 Number of SDRAM banks 18 Supported CAS Latencies 19 CS Latencies 20 WE Latencies 21 SDRAM DIMM module attributes 22 SDRAM Device Attributes :Gene- ral 23 Minimum Clock Cycle Time at CAS Latency = 2 24 Maximum data access time from Clock for CL=2 25 Minimum Clock Cycle Time at CL =1 26 Maximum Data Access Time from Clock at CL=1 27 Minimum Row Precharge Time SPD Entry Value 128 256 SDRAM 12 8 1/2 64 0 LVTTL 10.0 ns 6.0 ns none Self-Refresh, 15.6µs x16 n/a / x8 tccd = 1 CLK 1, 2, 4, 8 & full page 4 CL = 2 & 3 CS latency = 0 WL = 0 non buffered/ non reg. Vcc tol +/- 10% 10.0 / 12.0ns 6.0 / 7.0ns not supported not supported 20 / 30 ns 4Mx64 -8 80 08 04 0C 08 01 40 00 01 A0 60 00 80 10 00 01 8F 04 06 01 01 00 06 A0 60 FF FF 14 4Mx64 -8B 80 08 04 0C 08 01 40 00 01 A0 60 00 80 10 00 01 8F 04 06 01 01 00 06 C0 70 FF FF 1E Hex 4Mx72 -8 80 08 04 0C 8Mx64 -8 80 08 04 0C 08 08 01 02 48 40 00 00 01 01 A0 A0 60 60 02 00 80 80 10 10 08 00 01 01 8F 8F 04 04 06 06 01 01 01 01 00 00 06 06 A0 A0 60 60 FF FF FF FF 14 14 8Mx64 -8B 80 08 04 0C 08 02 40 00 01 A0 60 00 80 10 00 01 8F 04 06 01 01 00 06 C0 70 FF FF 1E 8Mx72 -8 80 08 04 0C 08 02 48 00 01 A0 60 02 80 10 08 01 8F 04 06 01 01 00 06 A0 60 FF FF 14 Semiconductor Group 11 11 Page

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