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PDF PC2119V Data sheet ( Hoja de datos )
| Número de pieza | PC2119V | |
| Descripción | LCD controllers/drivers | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
PCF2119x
LCD controllers/drivers
Product specification
Supersedes data of 1997 Nov 21
File under Integrated Circuits, IC12
1999 Mar 02
1 page  
Philips Semiconductors
LCD controllers/drivers
Product specification
PCF2119x
6 PAD INFORMATION
The identification of each pad and its location is given in Chapter 17.
6.1 Pad functions
Table 1 Pad function description
SYMBOL
VDD1
VDD2
VSS1
VSS2
VLCD1
VLCD2
E
T1
T2
T3
R1 to R18;
R17DUP
C1 to C80
SCL
POR
PD
SDA
R/W
RS
DB0 to DB7
OSC
DESCRIPTION
Supply voltage for all except the high voltage generator.
Supply voltage for the high voltage generator.
This is the ground pad for all except the high voltage generator.
This is the ground pad for the high voltage generator.
This input is used for the generation of the LCD bias levels.
This is the VLCD output pad if VLCD is generated internally. This pad must be connected to VLCD1.
The data bus clock input is set HIGH to signal the start of a read or write operation; data is clocked in
or out of the chip on the negative edge of the clock; note 1.
These are three test pads. T1 and T2 must be connected to VSS1; T3 is left open-circuit and is not user
accessible.
LCD row driver outputs R1 to R18; these pads output the row select waveforms to the display;
R17 and R18 drive the icons. R17 has two pads R17 and R17DUP.
LCD column driver outputs C1 to C80.
I2C-bus serial clock input; note 1.
External power-on reset input.
PD selects the chip power-down mode; for normal operation PD = 0.
I2C-bus serial data input/output; note 1.
This is the read/write input. R/W selects either the read (R/W = 1) or write (R/W = 0) operation. This
pad has an internal pull-up resistor.
The RS input selects the register to be accessed for read and write. RS = 0, selects the instruction
register for write and the busy flag and address counter for read. RS = 1, selects the data register for
both read and write. This pad has an internal pull-up resistor.
The 8-bit bidirectional data bus (3-state) transfers data between the system controller and the
PCF2119x. DB7 may be used as the busy flag, signalling that internal operations are not yet
completed. In 4-bit operations the 4 higher order lines DB7 to DB4 are used; DB3 to DB0 must be left
open-circuit. Data bus line DB3 has an alternative function (SA0), when selected this is the I2C-bus
address pad. Each data line has its own internal pull-up resistor; note 1.
Oscillator or external clock input. When the on-chip oscillator is used this pad must be connected to
VDD1.
Note
1. When the I2C-bus is used, the parallel interface pad E must be at logic 0. In the I2C-bus read mode DB7 to DB0
should be connected to VDD1 or left open-circuit.
a) When the parallel bus is used, pads SCL and SDA must be connected to VSS1 or VDD1; they must not be left
open-circuit.
b) If the 4-bit interface is used without reading out from the PCF2119x (i.e. R/W is set permanently to logic 0), the
unused ports DB0 to DB4 can either be set to VSS1 or VDD1 instead of leaving them open-circuit.
1999 Mar 02
5
5 Page 
Philips Semiconductors
LCD controllers/drivers
Product specification
PCF2119x
handbook, full pagewiduthpper
lower 4 bits
4 bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
xxxx 0000 1
xxxx 0001 2
xxxx 0010 3
xxxx 0011 4
xxxx 0100 5
xxxx 0101 6
xxxx 0110 7
xxxx 0111 8
xxxx 1000 9
xxxx 1001 10
xxxx 1010 11
xxxx 1011 12
xxxx 1100 13
xxxx 1101 14
xxxx 1110 15
xxxx 1111 16
Fig.7 Character set ‘S’ in CGROM.
MGL534
1999 Mar 02
11
11 Page | ||
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| PDF Descargar | [ Datasheet PC2119V.PDF ] | |
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