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Número de pieza PBL388131SO
Descripción Voice-switched Speakerphone Circuit with built in loudspeaker amplifier
Fabricantes Ericsson 
Logotipo Ericsson Logotipo



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January 1998
PBL 388 13
Voice-switched Speakerphone Circuit
with built in loudspeaker amplifier
Description.
Key Features
The PBL 388 13 contains all the necessary circuitry, amplifiers, detectors,
comparator and control functions to implement a high performance, voice-switched,
loudspeaking, ”hands-free ” telephone. The gain dynamics (attenuation between
channels) is selectable (25dB or 50dB) via a separate pin. A background noise detector
in the transmitting channel reduces the influence of continuous external noise signals
to the switching .
The PBL 388 13 is designed for telephone systems that are either powered from
the telephone line or from a mains powered constant voltage dc. supply. The circuit
contains a transformerless audio power amplifier with a current supply circuitry
(patented) that eliminates the need of inductors. Automatic volume attenuation in the
power amplifier extends the operating range at low line currents. A special feature in
this circuit is that the power amplifier volume control can be implemented either as an
ac. potentiometer control or as a digital control by a µ-processor (dc. control).
Filtering is possible of both, the audio and the speech switching control signals,
in both transmitter and receiver channels.
17 18 19 20
Minimum of external components
needed for function.
Selectable gain dynamics. (25 or 50
dB)
Direct telephone line powered solution
(patented).
Low power consumption: 1mA at 3.3V
(typical) for speech switching, audio
power amplifier quiscent current 1mA.
Drives an 25 - 50 ohm loudspeaker
without a transformer.
Background noise compensation in the
transmitting channel with hold function
at receive.
Input amplifiers of both channels have
balanced inputs.
Exellent noise performance.
Encapsulated in 24 pin plastic ”skinny”
DIP and 24 pin SO .
22
+
21
4
24
15 +
F3
3
5
PBL 388 13
Control
F6
23
16
11
12
10
24 pin SO
F2
1
2
F1
+
7
F5
Ref.
68 9
14
F4
+
13
24 pin DIP
Figure 1. Block diagram.
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PBL388131SO pdf
PBL 388 13
-Txin 1
+Txin 2
F2out 3
Txout 4
TxDetin 5
TxDetout 6
N Det 7
CMP 8
RxDetout 9
RxDetin 10
Rxout 11
F5out 12
24 CTR
23 LSPin
22 RE
21 RDC
20 +L
19 VOL
18 LSP
17 -C
16 GND
15 V+
14 -Rxin
13 +Rxin
24 pin DIP
Figure 6. Pin configuration.
Pin Descriptions
Refer to figure 6. (24 pin DIP and 24 pin SO package)
Pin Symbol Description
Pin
1
-Txin
Transmitter channel negative input.
11
Input impedance 3.16 kohm.
2
+Txin Transmitter channel positive input.
12
Input impedance 100 kohm.
3
F2out Output of the second amplifier in the
13
transmitter channel.
4
Txout Transmitter channel output. Min. ac
14
load impedance 10 kohm.
5 TxDetin Input of the transmitter channel signal 15
detector. Input impedance 13 kohm.
6 TxDetout Output of the transmitter channel signal
detector. Goes nagative referred to the 16
internal ref. voltage of appx. 2V when a 17
transmitter signal is present.
18
7
NDet
Background noise detector output.
Goes positive referred to the internal ref.
19
voltage of app. 2V when a background
noise signal is present
8
CMP
Comparator input. External resistance 20
to this point should not be less than
50 kohm. Summing point to the different 21
detector outputs.
22
9
RxDetout Output of the receiver channel signal
23
detector. Goes positive referred to the
internal ref. voltage of appx. 2V when a 24
receiver signal is present
10 RxDetin Input of the receiver channel signal
detector. Input impedance 13 kohm.
-Txin 1
+Txin 2
F2out 3
Txout 4
TxDetin 5
TxDetout 6
N Det 7
CMP 8
RxDetout 9
RxDetin 10
Rxout 11
F5out 12
24 CTR
23 LSP in
22 RE
21 RDC
20 +L
19 VOL
18 LSP
17 -C
16 GND
15 V+
14 -Rxin
13 +Rxin
24 pin SO
Symbol Description
Rxout
F5out
+Rxin
-Rxin
V+
GND
-C
LS
VOL
+L
RDC
RE
LSPin
CTR
Receiver channel output. Min. ac load
impedance 10 kohm.
Output of the second amplifier in the
receiver channel.
Receiver channel positive input. Input
impedance 140 kohm.
Receiver channel negative input. Input
impedance 20 kohm.
Supply of the speech switching circuitry.
A shunt regulator, voltage apprx. 3.3V at
1.0mA.
System ground (- line ).
Loudspeaker power amplifier output.
Volume control input. By sourcing a
current of appx. 0-40 µA into this pin the
gain can be reduced.
Positive supply for the loudspeaker
amplifier.
Power ampl. supply options. Pins - C,
RDC and RE are explained in the text.
Loudspeaker amplifier signal input. Input
impedance 30 kohm.
Control input for gain dynamics
(25 or 50dB), mute and disable.
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PBL388131SO arduino
PBL 388 13
Speech IC
1
TX
+
C + 19
Vc
18
17
2 IB
Z0
22
IC IE 21
R VR
IR
VRE RE
-
+
IL
20
2V DC-
supply
23
2,6V Level shift
16
+
-
Vs
PBL 388 13
+ Line
audio input
from Rx
channel
- Line
VRE = VR;
V R = I R x R;
I L = I R = I B + I C ; I C < 50 x IE = 50
VS = 0 then IC = 0
x
VR
RE
= 50
x
R
RE
x
IR
Figure 23. Loudspeaker amplifier current supply system.
Some optional features using
the dc. set volume control on
the loudspeaker amplifier of
PBL 388 13.
The DC set volume control has an
wholly internal function to lower the gain at
low supply voltages. This is to avoid that
the power stage dies and causes breaks in
the output signal at long line lengths ie. low
currents in combination with high input
signals. This DC controlled volume is
externally accessible in the PBL 388 13
and can thus be utilized in several ways.
PBL
388 13 19
This resistor sets
+
the max. attenuation
a).
This resistor sets
the min. attenuation
position on the pot.
PBL
388 13
+
Weighted
resistors
19
b).
Three bit
digital
signal
Figure 24. DC - volume control options.
a). To control the loudspeaker volume
with a DC- voltage from a potentiometer.
b). To control the loudspeaker volume
with a digital signal ( for ex. 8 - levels ).
c). An AGC can be combined with the
volume control by connecting a resistor
from the DC - control pin 19 to the output of
the receiver detector at pin 9. Care has to
be taken not to disturb the speech switching
balance. If the resistor is made too low
ohmic the same value has to be applied on
the transmitter detector output at pin 6 as
well as that the capacitors at the detector
outputs have to be made bigger.
19
PBL
388 13
9
c).
To volume
control
Resistor that is added
and which determines
the dynamics of the AGC
19 + + pin 4
PBL
388 13
10µF
To volum
control
Resistor that sets the
"softclipping" level
d). A ”softclipping” with a fixed level
can be combined with the volume control.
A draw back with the fixed level is that
when setting it in to inhibit clipping distortion
at a long line ie. low level, the level will not
increase with short lines even if the supply
voltage would allow it. In the other case
when setting the level for a short line some
amplitude clipping on long line can be
expected.
11
d).
18
PBL 20
388 13
17
Sets the steepness
of the "softclipping"
Resistor that sets the
"softclipping" level
e). A ”softclipping” that is controlled by
the ”real” output level that means that the
"softclipping" will follow the line current
changes and will at all times give the opti-
mum distortion limiting performance.
19
e).
+
10µF
To volume
control
Figure 25. DC - volume control options.
11

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