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PDF PBL386141 Data sheet ( Hoja de datos )

Número de pieza PBL386141
Descripción Subscriber Line Interface Circuit
Fabricantes Ericsson 
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Preliminary Information
February 2000
PBL 386 14/1
Subscriber Line
Interface Circuit
Description
The PBL 386 14/1 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in ISDN Network Terminal Adapters and other short loop
telecommunication equipment which often are remote powered, and by that, the
available power is limited. The PBL 386 14/1 has been optimized for low total line
interface cost, low power and requires a minimum of external components.
The PBL 386 14/1 has constant current feed, programmable to max 30mA. The SLIC
uses a first battery voltage for On-hook . A second battery voltage is used for
Off-hook and must be connected, to reduce short loop power dissipation. The SLIC
automatically switches between the two battery supply voltages without need for
external components or external control. The loop current controls the switching
between On-hook and Off-hook battery.
The SLIC incorporates loop current, ground key and ring trip detection functions.
The PBL 386 14/1 is compatible with loop start signalling. Two- to four-wire and
four- to two-wire voice frequency (vf) signal conversion is accomplished by the SLIC
in conjunction with either a conventional CODEC/filter or with a programmable
CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable line terminating
impedance could be complex or real to fit every market. Longitudinal voltages are
suppressed by a feedback loop in the SLIC and the longitudinal balance specifica-
tions meet Bellcore TR909 requirements.
The PBL 386 14/1 package is a very PCB space efficient 28-pin SSOP.
DT
DR
TIPX
RINGX
HP
TS
Two-wire
Interface
Ring Trip
Comparator
Ground Key
Detector
Line Feed
Controller
and
Longitudinal
Signal
Suppression
Ring Relay
Driver
Input
Decoder and
Control
RRLY
C1
C2
C3
VCC
DET
PSG
LP
REF
PLC
Applications
• ISDN Network terminals
• Shortloop applications
Key Features
• Small footprint with SSOP package
• On-hook and Off-hook battery with
automatic switching, controlled by
loop current
• On-hook battery current is limited
to 6 mA
• 37 mW on-hook power dissipation in
active state
• Metering 0.5 Vrms (0.7 Vpeak)
• Adaptive Overhead Voltage
The overhead voltage follows
1Vpeak<signals<2.5Vpeak
• Battery supply as low as -10V
• Only +5V in addition to GND
and battery (VEE optional)
• Open loop voltage tracks On-hook
battery
• Full longitudinal current capability
during On-hook
• 43.5V open loop voltage @ -48V
battery feed
• Automatic compensation for
line leakage up to 5 mA
• On-hook transmission
• Programmable loop & ring-trip
detector threshold
• Ground key detector
• Analog temperature guard with status
exclusively viewed at detector output
• Integrated Ring Relay Driver
• Linevoltage measurement
VBAT2
VBAT
BGND
Off-hook
Detector
VF Signal
Transmission
PLD
AGND
VTX
RSN
VEE
(optional)
PBL 386 14/1
Figure 1. Block diagram.
Package: 28-pin SSOP
1

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PBL386141 pdf
Parameter
Four-wire to two-wire, g4-2
Four-wire to four-wire, g4-4
Insertion loss
Two-wire to four-wire, G2-4
Four-wire to two-wire, G4-2
Gain tracking
Two-wire to four-wire RLDC2k
Four-wire to two-wire RLDC2k
Noise
Idle channel noise at two-wire
(TIPX-RINGX)
Harmonic distortion
Two-wire to four-wire
Four-wire to two-wire
Battery feed characteristics
Constant loop current, ILConst
PBL 386 14/1
Ref
fig Conditions
6 relative to 0 dBm, 1.0 kHz. EL = 0 V
0.3 kHz < f < 3.4 kHz
f = 8 kHz, 12 kHz,
16 kHz
6 relative to 0 dBm, 1.0 kHz. EL = 0 V
0.3 kHz < f < 3.4 kHz
Min
-0.15
-1.0
-1.0
-0.15
Typ
-0.2
-0.3
Max
0.15
0
0
0.15
Unit
dB
dB
dB
dB
6 0 dBm, 1.0 kHz, Note 5
G2-4 = 20 • Log
VTX
VTR
,ERX = 0
6 0 dBm, 1.0 kHz, Notes 5, 6
G4-2 = 20 • Log
VTR
ERX
,EG = 0
6 Ref. -10 dBm, 1.0 kHz, Note 7
-40 dBm to +3 dBm
-55 dBm to -40 dBm
6 Ref. -10 dBm, 1.0 kHz, Note 7
-40 dBm to +3 dBm
-55 dBm to -40 dBm
-6.22 -6.02 -5.82 dB
-0.2 0.2 dB
-0.1 0.1 dB
-0.2 0.2 dB
-0.1 0.1 dB
-0.2 0.2 dB
C-message weighting
Psophometrical weighting
Note 8
7 12 dBrnC
-83 -78 dBmp
6 0 dBm, 1.0 kHz test signal
0.3 kHz < f < 3.4 kHz
-50 dB
-50 dB
13
ILProg
=
500
RLC
18 < ILProg < 30 mA
0.95 ILProg
ILProg
1.05 ILProg mA
Figure 6.
Frequency response, insertion loss,
gain tracking.
1
ωC
<< RL, RL = 600
RT = 120 k, RRX = 120 k
C
TIPX
VTX
RL
VTR ILDC PBL 386 14/1
RT
EL
RINGX
RSN
RRX
E RX
VTX
5

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PBL386141 arduino
PBL 386 14/1
Hybrid Function
The hybrid function can easily be imple-
mented utilizing the uncommitted amplifier
in conventional CODEC/filter combinations.
Please, refer to figure 10. Via impedance
ZB a current proportional to VRX is injected
into the summing node of the combination
CODEC/filter amplifier. As can be seen
from the expression for the four-wire to
four-wire gain a voltage proportional to VRX
is returned to VTX. This voltage is converted
by RTX to a current flowing into the same
summing node. These currents can be
made to cancel by letting:
VTX
RTX
+
VRX
ZB
=
0
(EL
=
0)
The four-wire to four-wire gain, G4-4, in-
cludes the required phase shift and thus
the balance network ZB can be calculated
from:
ZB
=
-
RTX
VRX
VTX
=
-
RTX
ZRX
ZT
ZT
αRSN
-
G2-4S
(
ZL
+
2RF)
G2-4S ( ZL + 2RF)
When choosing RTX, make sure the
output load of the VTX terminal is (RTX//RT
in Figure 14) > 20 k.
If calculation of the ZB formula above
yields a balance network containing an
inductor, an alternate method is recom-
mended.
The PBL 386 14/1 SLIC may also be
used together with programmable CODEC/
filters. The programmable CODEC/filter
allows for system controller adjustment of
hybrid balance to accommodate different
line impedances without change of hard-
ware. In addition, the transmit and receive
gain may be adjusted. Please, refer to the
programmable CODEC/filter data sheets
for design information.
Longitudinal Impedance
A feed back loop counteracts longitudinal
voltages at the two-wire port by injecting
longitudinal currents in opposing phase.
Thus longitudinal disturbances will ap-
pear as longitudinal currents and the TIPX
and RINGX terminals will experience very
small longitudinal voltage excursions, leav-
ing metallic voltages well within the SLIC
common mode range.
The SLIC longitudinal impedance per wire,
ZLoT and ZLoR, appears as typically 20 to
longitudinal disturbances. It should be not-
ed that longitudinal currents may exceed
the dc loop current without disturbing the vf
transmission.
Capacitors CTC and CRC
If RFI filtering is needed, the capacitors
designated CTC and CRC in figure 13, con-
nected between TIPX and ground as well
as between RINGX and ground, may be
mounted.
CTC and CRC work as RFI filters in con-
junction with suitable series impedances
(i.e. resistances, inductances). Resistors
RF1 and RF2 may be sufficient, but series
inductances can be added to form a sec-
ond order filter. Current-compensated in-
ductors are suitable since they suppress
common-mode signals with minimum influ-
ence on return loss. Recommended values
for CTC and CRC are below 1 nF. Lower
values impose smaller degradation on re-
turn loss and longitudinal balance, but also
attenuate radio frequencies to a smaller
extent. The influence on the impedance
loop must also be taken into consideration
when programming the CODEC. CTC and
CRC contribute to a metallic impedance of
1/(πfCTC) = 1/(πfCRC), a TIPX to ground
impedance of 1/(2πfCTC) and a RINGX to
ground impedance of 1/(2πfCRC).
AC - DC Separation Capacitor, CHP
The high pass filter capacitor connected
between terminals HP and RINGX p r o -
vides the separation of the ac and dc
signals. CHP positions the low end frequen-
cy response break point of the ac loop in the
SLIC. Refer to table 1 for recommended
value of CHP.
Example: A CHP value of 68 nF will
position the low end frequency response
3dB break point of the ac loop at 13 Hz (f3dB)
according to f3dB = 1/(2πRHPCHP) where
RHP = 180 k.
VTX RTX
PBL
386 14/1 ZT ZB
ZRX
RSN
Figure 10. Hybrid function.
VT
Combination
CODEC/Filter
VRX
11

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