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PDF RF1S40N10 Data sheet ( Hoja de datos )

Número de pieza RF1S40N10
Descripción 40A/ 100V/ 0.040 Ohm/ N-Channel Power MOSFETs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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Data Sheet
RFG40N10, RFP40N10, RF1S40N10,
RF1S40N10SM
January 2002
40A, 100V, 0.040 Ohm, N-Channel Power
MOSFETs
These are N-Channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, relay drivers and emitter switches for bipolar
transistors. These transistors can be operated directly from
integrated circuits.
Formerly developmental type TA9846
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFG40N10
TO-247
RFG40N10
RFP40N10
TO-220AB
RFP40N10
RF1S40N10
TO-262AA
F1S40N10
RF1S40N10SM
TO-263AB
F1S40N10
NOTE: When ordering, use the entire part number. Add the suffix, 9A,
to obtain the TO-263AB variant in tape and reel, i.e. RF1S40N10SM9A.
Packaging
DRAIN
(FLANGE)
JEDEC STYLE TO-247
SOURCE
DRAIN
GATE
Features
• 40A, 100V
• rDS(ON) = 0.040
• UIS Rating Curve
• SOA is Power Dissipation Limited
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
JEDEC TO-262AA
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
©2002 Fairchild Semiconductor Corporation
RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM Rev. C

1 page




RF1S40N10 pdf
RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 13. UNCLAMPED ENERGY WAVEFORMS
RGS
RL
DUT
+
VDD
-
VGS
FIGURE 14. SWITCHING TIME TEST CIRCUIT
VDS
RL
VGS
Ig(REF)
DUT
+
VDD
-
FIGURE 16. GATE CHARGE TEST CIRCUIT
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 15. RESISTIVE SWITCHING WAVEFORMS
VDD
VDS
Qg(TOT)
VGS
VGS = 2V
0
Qg(10)
Qg(TH)
VGS = 10V
VGS = 20V
Ig(REF)
0
FIGURE 17. GATE CHARGE WAVEFORMS
©2002 Fairchild Semiconductor Corporation
RFG40N10, RFP40N10, RF1S40N10, RF1S40N10SM Rev. C

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