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PDF RFG60P03 Data sheet ( Hoja de datos )

Número de pieza RFG60P03
Descripción 60A/ 30V/ 0.027 Ohm/ P-Channel Power MOSFETs
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! RFG60P03 Hoja de datos, Descripción, Manual

RFG60P03, RFP60P03, RF1S60P03SM
Data Sheet
July 1999 File Number 3951.3
60A, 30V, 0.027 Ohm, P-Channel Power
MOSFETs
These P-Channel power MOSFETs are manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49045.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFG60P03
TO-247
RFG60P03
RFP60P03
TO-220AB
RFP60P03
RF1S60P03SM
TO-263AB
F1S60P03
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in tape and reel, i.e. RF1S60P03SM9A.
Packaging
JEDEC STYLE TO-247
DRAIN
(BOTTOM
SIDE METAL)
SOURCE
DRAIN
GATE
Features
• 60A, 30V
• rDS(ON) = 0.027
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
DRAIN
(FLANGE)
JEDEC TO-220AB
SOURCE
DRAIN
GATE
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
4-140
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




RFG60P03 pdf
RFG60P03, RFP60P03, RF1S60P03SM
Typical Performance Curves Unless Otherwise Specified (Continued)
5000
4000
3000
2000
1000
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGS
COSS
CRSS
-30
-22.5
-15
-7.5
VDD = BVDSS
VDD = BVDSS
RL = 0.5
IG(REF) = -3mA
VGS = -10V
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
0.25 BVDSS 0.25 BVDSS
-10
-7.5
-5.0
-2.5
0
0 -5 -10 -15 -20 -25
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
0
IG(REF)
20
IG(ACT)
t, TIME (µs)
IG(REF)
80
IG(ACT)
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VGS
tP
RG
VDS
L
DUT
-
VDD
+
IAS
0.01
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
VGS
VGS
RGS
VDS
RL
DUT
-
VDD
+
FIGURE 16. SWITCHING TIME TEST CIRCUIT
tAV
0
VDD
IAS
tP
BVDSS
VDS
FIGURE 15. UNCLAMPED ENERGY WAVEFORM
tON
td(ON)
tr
0
10%
tOFF
td(OFF)
tf
10%
VDS
VGS
0
90%
10%
50%
PULSE WIDTH
90%
50%
90%
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
4-144

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