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PDF RFD8P06LESM Data sheet ( Hoja de datos )
| Número de pieza | RFD8P06LESM | |
| Descripción | 8A/ 60V/ 0.300 Ohm/ ESD Rated/ Logic Level/ P-Channel Power MOSFET | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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RFD8P06LE, RFD8P06LESM, RFP8P06LE
Data Sheet
July 1999 File Number 4273.1
8A, 60V, 0.300 Ohm, ESD Rated, Logic
Level, P-Channel Power MOSFET
These products are P-Channel power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49203.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD8P06LE
TO-251AA
F8P6LE
RFD8P06LESM
TO-252AA
F8P6LE
RFP8P06LE
TO-220AB
FP8P06LE
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e.,
RFD8P06LESM9A.
Features
• 8A, 60V
• rDS(ON) = 0.300Ω
• 2kV ESD Protected
• Temperature Compensating PSPICE® Model
• PSPICE Thermal Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
Symbol
D
G
S
Packaging
JEDEC TO-251AA
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
JEDEC TO-220AB
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
7-11
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
RFD8P06LE, RFD8P06LESM, RFP8P06LE
Typical Performance Curves Unless Otherwise Specified
1.4
VGS = VDS, ID = -250µA
1.2
1.0
0.8
0.6
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
-60
VDD =BVDSS
-45
VDD = BVDSS
RL = 7.5Ω
-30 IG(REF) = -0.20mA
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
-15 0.25 BVDSS 0.25 BVDSS
VGS = -5V
-5.00
-3.75
-2.50
-1.25
0
IG(REF)
20
IG(ACT)
t, TIME ( µs)
IG(REF)
80
IG(ACT)
0.00
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
125
VDD = -30V, ID = -8A, RL= 3.75Ω
100
tr
75
td(OFF)
50
tf
25
td(ON)
0
0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 13. SWITCHING TIME AS A FUNCTION OF GATE
RESISTANCE
1000
800
600
CISS
VGS = 0V, f = 0.1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
400
200
0
0
COSS
CRSS
-10 -20 -30 -40 -50
VDS, DRAIN TO SOURCE VOLTAGE (V)
-60
FIGURE 15. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
RG
0V
tP
-VGS
VDS
L
DUT
-
VDD
+
IAS
0.01Ω
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
tAV
0
VDD
IAS
tP
BVDSS
VDS
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
7-15
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet RFD8P06LESM.PDF ] | |
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