DataSheet.es    


PDF RM5231-150-Q Data sheet ( Hoja de datos )

Número de pieza RM5231-150-Q
Descripción RM5231 Microprocessor with 32-Bit System Bus Data Sheet Released
Fabricantes PMC-Sierra Inc 
Logotipo PMC-Sierra  Inc Logotipo



Hay una vista previa y un enlace de descarga de RM5231-150-Q (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! RM5231-150-Q Hoja de datos, Descripción, Manual

RM5231Microprocessor with 32-Bit System Bus Data Sheet
Released
RM5231
RM5231Microprocessor with 32-Bit
System Bus
Data Sheet
Proprietary and Confidential
Issue 1, March 2001
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers Internal Use
Document ID: PMC-2002165, Issue 1

1 page




RM5231-150-Q pdf
RM5231Microprocessor with 32-Bit System Bus Data Sheet
Released
Table of Contents
Legal Information ...........................................................................................................................2
Revision History .............................................................................................................................3
Document Conventions .................................................................................................................4
Table of Contents ..........................................................................................................................5
List of Figures ................................................................................................................................7
List of Tables .................................................................................................................................8
1 Features ..................................................................................................................................9
2 Block Diagram .......................................................................................................................10
3 Hardware Overview ...............................................................................................................11
3.1 Superscalar Dispatch ...................................................................................................11
3.2 CPU Registers .............................................................................................................11
3.3 Pipeline ........................................................................................................................11
3.4 Integer Unit ..................................................................................................................12
3.5 Register File .................................................................................................................12
3.6 ALU ..............................................................................................................................12
3.7 Integer Multiply/Divide ..................................................................................................12
3.8 Floating-Point Co-Processor ........................................................................................13
3.9 Floating-Point Unit .......................................................................................................13
3.10 Floating-Point General Register File ............................................................................15
3.11 System Control Co-processor (CP0) ............................................................................15
3.12 System Control Co-Processor Registers .....................................................................15
3.13 Virtual to Physical Address Mapping ............................................................................16
3.14 Joint TLB ......................................................................................................................17
3.15 Instruction TLB .............................................................................................................18
3.16 Data TLB ......................................................................................................................18
3.17 Cache Memory .............................................................................................................18
3.18 Instruction Cache .........................................................................................................18
3.19 Data Cache ..................................................................................................................19
3.20 Write Buffer ..................................................................................................................20
3.21 System Interface ..........................................................................................................21
3.22 System Address/Data Bus ...........................................................................................21
3.23 System Command Bus ................................................................................................21
3.24 Handshake Signals ......................................................................................................22
3.25 Non-overlapping System Interface ...............................................................................22
3.26 Enhanced Write Modes ................................................................................................23
3.27 External Requests ........................................................................................................24
3.28 Interrupt Handling ........................................................................................................24
3.29 Standby Mode ..............................................................................................................24
3.30 JTAG Interface .............................................................................................................24
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers Internal Use
Document ID: PMC-2002165, Issue 1
5

5 Page





RM5231-150-Q arduino
RM5231Microprocessor with 32-bit System Bus Data Sheet
Released
3 Hardware Overview
The RM5231 offers a high-level of integration targeted at high-performance embedded
applications. The key elements of the RM5231 are briefly described in this section.
3.1 Superscalar Dispatch
The RM5231 has an asymmetric superscalar dispatch unit which allows it to issue an integer
instruction and a floating-point computation instruction simultaneously. Integer instructions
include ALU, branch, load/store, and floating-point load/store, while floating-point computation
instructions include floating-point add, subtract, combined multiply-add, converts, etc. In
combination with its high-throughput fully pipelined floating-point execution unit, the superscalar
capability of the RM5231 provides unparalleled price/performance in computationally intensive
embedded applications.
3.2 CPU Registers
The RM5231 CPU has a user-visible state consisting of 32 general purpose registers, two special
purpose registers for integer multiplication and division, a program counter, and no condition code
bits. Figure 2 shows the user visible state.
Figure 2 CPU Registers
General Purpose Registers
63 0
0
r1
r2
r29
r30
r31
Multiply/Divide Registers
63
HI
63
LO
0
0
Program Counter
63
PC
0
3.3 Pipeline
For integer operations, loads, stores, and other non-floating-point operations, the RM5231 uses a
5-stage pipeline. In addition to the integer pipeline, the RM5231 uses an extended 7-stage pipeline
for floating-point operations.
Figure 3 shows the RM5231 integer pipeline. As illustrated in the figure, up to five integer
instructions can be executing simultaneously.
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers Internal Use
Document ID: PMC-2002165, Issue 1
11

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet RM5231-150-Q.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
RM5231-150-QRM5231 Microprocessor with 32-Bit System Bus Data Sheet ReleasedPMC-Sierra  Inc
PMC-Sierra Inc

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar