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PDF P8xC592 Data sheet ( Hoja de datos )

Número de pieza P8xC592
Descripción 8-bit microcontroller with on-chip CAN
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! P8xC592 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
P8xC592
8-bit microcontroller
with on-chip CAN
Product specification
Supersedes data of January 1995
File under Integrated Circuits, IC18
1996 Jun 27

1 page




P8xC592 pdf
Philips Semiconductors
8-bit microcontroller with on-chip CAN
5 PINNING
Product specification
P8xC592
handbook, full pagewidth
XTAL1
XTAL2
EA
alternative function
PSEN
ALE
PWM0
PWM1
CRX0
CRX1
REF
AVSS
AV DD
AV ref+
AV ref –
STADC
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
PORT 5
0
1
2
3
4
5
6
7
CMSR0
CMSR1
CMSR2
CMSR3
CMSR4
CMSR5
CMT0
CMT1
PORT 4
0
1
2
3
4
5
6
7
RST
EW
P8xC592
MGA147 - 2
0
1
2
3
4 PORT 0
5
6
7
0
1
2
3
4 PORT 1
5
6
7
0
1
2
3
PORT 2
4
5
6
7
0
1
2
3
PORT 3
4
5
6
7
CVSS
V SS
VDD
alternative function
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
LOW ORDER
ADDRESS
AND
DATA BUS
CT0I/INT2
CT1I/INT3
CT2I/INT4
CT3I/INT5
T2
RT2
CTX0
CTX1
A8
A9
A10
A11 HIGH ORDER
ADDRESS
A12 BUS
A13
A14
A15
RXD/DATA
TXD/CLOCK
INT0
INT1
T0
T1
WR
RD
1996 Jun 27
Fig.2 Pin functions.
5

5 Page





P8xC592 arduino
Philips Semiconductors
8-bit microcontroller with on-chip CAN
Product specification
P8xC592
7.1 Program Memory
The Program Memory of the P8xC592 consists of 16 kbytes ROM on-chip, externally expandible up to 64 kbytes.
Table 3 Instruction fetch controlled by EA
PIN EA (note 1)
DURING RESET
LATCHED TO:
AFTER RESET
INSTRUCTIONS FETCHED FROM:
H internal Program Memory (note 2)
H external Program Memory
L
‘don’t care’
ADDRESS
LOCATION
0000H 3FFFH
4000H FFFFH
0000H FFFFH
Notes
1. This implementation prevents reading of the internal program code by switching from external Program Memory
during a MOVC instruction.
2. By setting a security bit the internal Program Memory content is protected, which means it cannot be read out.
If the security bit has been set to LOW there are no restrictions for the MOVC instruction.
7.2 Internal Data Memory
The internal Data Memory is physically built-up and accessible as shown in Table 4 (see Fig.5).
Table 4 Internal Data Memory size and address mode
INTERNAL
DATA MEMORY
SIZE
LOCATION
MAIN RAM
(note 1)
AUXILIARY RAM
(note 2)
SFRs (note 3)
256 bytes
256 bytes
128 bytes
0 to 127
128 to 255
0 to 255
128 to 255
ADDRESS MODE
DIRECT INDIRECT
POINTERS
X X address pointers are R0 and R1 of the
X selected register bank
X address pointers are R0 and R1 of the
selected register bank and the DPTR
X
Notes
1. MAIN RAM can be addressed directly and indirectly as in the 80C51.
2. AUXILIARY RAM (0 to 255):
a) Is indirectly addressable in the same way as the external Data Memory with MOVX instructions.
b) Access will not affect the ports P0, P2, P3.6 and P3.7 during internal program execution.
3. SFRs = Special Function Registers.
1996 Jun 27
11

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