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PDF P89C668HBBD Data sheet ( Hoja de datos )
| Número de pieza | P89C668HBBD | |
| Descripción | 80C51 8-bit Flash microcontroller family | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
P89C668
80C51 8-bit Flash microcontroller family
64KB ISP FLASH with 8KB RAM
Preliminary data
Supersedes data of 2001 Jul 19
IC28 Data Handbook
2001 Jul 27
Philips
Semiconductors
1 page  
Philips Semiconductors
80C51 8-bit Flash microcontroller family
64KB ISP Flash with 8KB RAM
Preliminary data
P89C668
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
PLCC LQFP
VSS
VCC
P0.0–0.7
22
44
43–36
16
38
37–30
P1.0–P1.7
2–9 40–44,
1–3
P2.0–P2.7
2
3
4
5
6
7
8
9
24–31
40
41
42
43
44
1
2
3
18–25
P3.0–P3.7
11, 5, 7–13
13–19
RST
ALE
11 5
13 7
14 8
15 9
16 10
17 11
18 12
19 13
10 4
33 27
PSEN
32 26
NAME AND FUNCTION
I Ground: 0 V reference.
I Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to them float
and can be used as high-impedance inputs. Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data memory. In this application, it uses strong
internal pull-ups when emitting 1s.
I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups on all pins except P1.6 and
P1.7 which are open drain. Port 1 pins that have 1s written to them are pulled high by the internal
pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled low will source
current because of the internal pull-ups. (See DC Electrical Characteristics: IIL).
Alternate functions for P89C668 Port 1 include:
I/O T2 (P1.0): Timer/Counter 2 external count input/Clockout (see Programmable Clock-Out)
I T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction Control
I ECI (P1.2): External Clock Input to the PCA
I/O CEX0 (P1.3): Capture/Compare External I/O for PCA module 0
I/O CEX1 (P1.4): Capture/Compare External I/O for PCA module 1
I/O CEX2 (P1.5): Capture/Compare External I/O for PCA module 2
I/O SCL (P1.6): I2C bus clock line (open drain)
I/O SDA (P1.7): I2C bus data line (open drain)
I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 2
pins that are externally being pulled low will source current because of the internal pull-ups. (See
DC Electrical Characteristics: IIL). Port 2 emits the high-order address byte during fetches from
external program memory and during accesses to external data memory that use 16-bit addresses
(MOVX @DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During
accesses to external data memory that use 8-bit addresses (MOV @Ri), port 2 emits the contents
of the P2 special function register.
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that
are externally being pulled low will source current because of the pull-ups. (See DC Electrical
Characteristics: IIL). Port 3 also serves the special features of the P89C668, as listed below:
I RxD (P3.0): Serial input port
O TxD (P3.1): Serial output port
I INT0 (P3.2): External interrupt
I INT1 (P3.3): External interrupt
I CEX3/T0 (P3.4): Timer 0 external input; Capture/Compare External I/O for PCA module 3
I CEX4/T1 (P3.5): Timer 1 external input; Capture/Compare External I/O for PCA module 4
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An
internal diffused resistor to VSS permits a power-on reset using only an external capacitor to VCC.
O Address Latch Enable: Output pulse for latching the low byte of the address during an access to
external memory. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency, and can be used for external timing or clocking. Note that one ALE pulse is skipped
during each access to external data memory. ALE can be disabled by setting SFR auxiliary.0.
With this bit set, ALE will be active only during a MOVX instruction.
O Program Store Enable: The read strobe to external program memory. When executing code from
the external program memory, PSEN is activated twice each machine cycle, except that two PSEN
activations are skipped during each access to external data memory. PSEN is not activated during
fetches from internal program memory.
2001 Jul 27
5
5 Page 
Philips Semiconductors
80C51 8-bit Flash microcontroller family
64KB ISP Flash with 8KB RAM
Preliminary data
P89C668
TIMER 2 OPERATION
Timer 2
Timer 2 is a 16-bit Timer/Counter which can operate as either an
event timer or an event counter, as selected by C/T2* in the special
function register T2CON (see Figure 1). Timer 2 has three operating
modes: Capture, Auto-reload (up or down counting), and Baud Rate
Generator, which are selected by bits in the T2CON as shown in
Table 4.
Capture Mode
In the capture mode there are two options which are selected by bit
EXEN2 in T2CON. If EXEN2=0, then timer 2 is a 16-bit timer or
counter (as selected by C/T2* in T2CON) which, upon overflowing
sets bit TF2, the timer 2 overflow bit. This bit can be used to
generate an interrupt (by enabling the Timer 2 interrupt bit in the
IE register). If EXEN2= 1, Timer 2 operates as described above, but
with the added feature that a 1- to -0 transition at external input
T2EX causes the current value in the Timer 2 registers, TL2 and
TH2, to be captured into registers RCAP2L and RCAP2H,
respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set, and EXF2 like TF2 can generate an interrupt
(which vectors to the same location as Timer 2 overflow interrupt.
The Timer 2 interrupt service routine can interrogate TF2 and EXF2
to determine which event caused the interrupt). The capture mode is
illustrated in Figure 2 (There is no reload value for TL2 and TH2 in
this mode. Even when a capture event occurs from T2EX, the
counter keeps on counting T2EX pin transitions or osc/12 pulses.).
Auto-Reload Mode (Up or Down Counter)
In the 16-bit auto-reload mode, Timer 2 can be configured (as either
a timer or counter [C/T2* in T2CON]) then programmed to count up
or down. The counting direction is determined by bit DCEN (Down
Counter Enable) which is located in the T2MOD register (see
Figure 3). When reset is applied the DCEN=0 which means Timer 2
will default to counting up. If DCEN bit is set, Timer 2 can count up
or down depending on the value of the T2EX pin.
Figure 4 shows Timer 2 which will count up automatically since
DCEN=0. In this mode there are two options selected by bit EXEN2
in T2CON register. If EXEN2=0, then Timer 2 counts up to 0FFFFH
and sets the TF2 (Overflow Flag) bit upon overflow. This causes the
Timer 2 registers to be reloaded with the 16-bit value in RCAP2L
and RCAP2H. The values in RCAP2L and RCAP2H are preset by
software means.
If EXEN2=1, then a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at input T2EX. This transition also
sets the EXF2 bit. The Timer 2 interrupt, if enabled, can be
generated when either TF2 or EXF2 are 1.
In Figure 5 DCEN=1 which enables Timer 2 to count up or down.
This mode allows pin T2EX to control the direction of count. When a
logic 1 is applied at pin T2EX Timer 2 will count up. Timer 2 will
overflow at 0FFFFH and set the TF2 flag, which can then generate
an interrupt, if the interrupt is enabled. This timer overflow also
causes the 16-bit value in RCAP2L and RCAP2H to be reloaded
into the timer registers TL2 and TH2.
When a logic 0 is applied at pin T2EX this causes Timer 2 to count
down. The timer will underflow when TL2 and TH2 become equal to
the value stored in RCAP2L and RCAP2H. Timer 2 underflow sets
the TF2 flag and causes 0FFFFH to be reloaded into the timer
registers TL2 and TH2.
The external flag EXF2 toggles when Timer 2 underflows or overflows.
This EXF2 bit can be used as a 17th bit of resolution if needed. The
EXF2 flag does not generate an interrupt in this mode of operation.
(MSB)
TF2
EXF2
RCLK
TCLK EXEN2
TR2
C/T2
(LSB)
CP/RL2
Symbol
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
Position
T2CON.7
T2CON.6
T2CON.5
T2CON.4
T2CON.3
T2CON.2
T2CON.1
T2CON.0
Name and Significance
Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software. TF2 will not be set
when either RCLK or TCLK = 1.
Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and
EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2
interrupt routine. EXF2 must be cleared by software. EXF2 does not cause an interrupt in up/down
counter mode (DCEN = 1).
Receive clock flag. When set, causes the serial port to use Timer 2 overflow pulses for its receive clock
in modes 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive clock.
Transmit clock flag. When set, causes the serial port to use Timer 2 overflow pulses for its transmit clock
in modes 1 and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock.
Timer 2 external enable flag. When set, allows a capture or reload to occur as a result of a negative
transition on T2EX if Timer 2 is not being used to clock the serial port. EXEN2 = 0 causes Timer 2 to
ignore events at T2EX.
Start/stop control for Timer 2. A logic 1 starts the timer.
Timer or counter select. (Timer 2)
0 = Internal timer (OSC/6)
1 = External event counter (falling edge triggered).
Capture/Reload flag. When set, captures will occur on negative transitions at T2EX if EXEN2 = 1. When
cleared, auto-reloads will occur either with Timer 2 overflows or negative transitions at T2EX when
EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to auto-reload
on Timer 2 overflow.
SU01209
Figure 1. Timer/Counter 2 (T2CON) Control Register
2001 Jul 27
11
11 Page | ||
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