DataSheet.es    


PDF P83C576EBBB Data sheet ( Hoja de datos )

Número de pieza P83C576EBBB
Descripción 80C51 8-bit microcontroller family 8K/256 OTP/ROM/ 6 channel 10-bit A/D/ 4 comparators/ failure detect circuitry/ watchdog timer
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



Hay una vista previa y un enlace de descarga de P83C576EBBB (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! P83C576EBBB Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
83C576/87C576
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D,
4 comparators, failure detect circuitry, watchdog timer
Product specification
Supersedes data of 1998 Jan 06
IC20 Data Handbook
1998 Jun 04
Philips
Semiconductors

1 page




P83C576EBBB pdf
Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
Product specification
83C576/87C576
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC DIP LCC QFP
VSS
VCC
P0.0-0.7
20
40
39-32
22
44
43-36
16
38
37-30
P1.0-P1.5
3-8 5-9 42-44
1-3
P2.0-P2.7
3
4
5
6
7
8
21-28
4
5
6
7
8
9
24-31
42
43
44
1
2
3
18-25
21 24 18
22 25 19
23 26 20
24 27 21
25 28 22
26 29 23
27 30 24
28 31 25
TYPE
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NAME AND FUNCTION
Ground: 0V reference.
Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
Port 0: Port 0 is a bidirectional I/O port. Port 0 is also the multiplexed low-order address and
data bus during accesses to external program and data memory (see Note 5). In this
application, it uses strong internal pull-ups when emitting 1s. Port 0 also receives code bytes
during parallel EPROM programming and outputs code bytes during verification. External
pull-ups are required during program verification. During reset, the port register is loaded
with 1’s. Port 0 has 4 output modes selected on a per bit basis by writing to the P0M1 and
P0M2 Special Function Registers as follows:
P0M1.x
P0M2.x
Mode Description
0 0 Open drain (default). See Note 1.
0 1 Weak pullup. See Note 2.
1 0 High impedance. See Note 3.
1 1 Push-pull. See Note 4.
Port 0 is also the data I/O port for the Universal Peripheral Interface (UPI). When the UPI is
enabled, port 0 must be configured as High-Z by the user. Input/Output through P0 is
controlled by pin CS, WR, RD, and A0. Output is push-pull when enabled.
Port 1: Port 1 is a 6-bit bidirectional I/O port with Schmitt trigger inputs. Port 1 receives the control
signals during program memory verification and parallel EPROM programming. During reset, port
1 is configured as a high impedance analog input port. Digital push-pull outputs are enabled by
writing 1’s to the P1M1 register. The programmer must take care to prevent digital outputs from
switching while an A/D conversion is in progress. Port 1 has 3 output modes selected on a per bit
basis by writing to the P1M1 and P1M2 special function registers as follows:
P1M1.X
P1M2.X Mode Description
0 0 A/D only. (High impedance)
0 1 Digital input only. High impedance (default).
1 X Push-pull.
Port 1 pins also serve alternate functions as follows:
P1.0/ADIN0
P1.1/ADIN1
P1.2/ADIN2
P1.3/ADIN3
P1.4/ADIN4
P1.5/ADIN5
Port 2: Port 2 is an 8-bit bidirectional I/O port. Port 2 emits the high-order address byte
during accesses to external program and data memory that use 16-bit addresses (MOVX
@DPTR) (see Note 5). In this application, it uses strong internal pull-ups when emitting 1s.
Port 2 receives the high-order address byte during program verification and parallel EPROM
programming. During reset, the port 2 pullups are turned on synchronously, and the port
register is loaded with 1’s. Port 2 has the following output modes which can be selected on a
per bit basis by writing to P2M1 and P2M0:
P2M1.X
0
0
1
1
P2M2.X
0
1
0
1
Mode Description
Open drain. See Note 1.
Weak pullup (default). See Note 2.
High impedance. See Note 3.
Push-pull. See Note 4.
Port 2 pins serve alternate functions as follows:
P2.0 CEX0 PCA module 0 external I/O
CMP0 comparator 0 output
P2.1
CEX1 PCA module 1 external I/O
CMP1 comparator 1 output
P2.2
CEX2 PCA module 2 external I/O
CMP2 comparator 2 output
P2.3
CEX3 PCA module 3 external I/O
CMP3 comparator 3 output
P2.4
T2EX timer 2 capture input
A0 UPI address input
P2.5
T2
CS
timer 2 external I/O — clock-out (programmable)
UPI chip select input
P2.6
CEX4 PCA module 4 external I/O
PWM0 Pulse width modulator 0 output
P2.7
ECI PCA count input
PWM1 Pulse width modulator 1 output
1998 Jun 04
5

5 Page





P83C576EBBB arduino
Philips Semiconductors
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators,
failure detect circuitry, watchdog timer
Product specification
83C576/87C576
also can only be cleared by software. The PCA interrupt system
shown in Figure 4.
Each module in the PCA has a special function register associated
with it. These registers are: CCAPM0 for module 0, CCAPM1 for
module 1, etc. (see Figure 7). The registers contain the bits that
control the mode that each module will operate in. The ECCF bit
(CCAPMn.0 where n=0, 1, 2, 3, or 4 depending on the module)
enables the CCF flag in the CCON SFR to generate an interrupt
when a match or compare occurs in the associated module. PWM
(CCAPMn.1) enables the pulse width modulation mode. The TOG
bit (CCAPMn.2) when set causes the CEX output associated with
the module to toggle when there is a match between the PCA
counter and the module’s capture/compare register. The match bit
MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON
register to be set when there is a match between the PCA counter
and the module’s capture/compare register.
The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5)
determine the edge that a capture input will be active on. The CAPN
bit enables the negative edge, and the CAPP bit enables the
positive edge. If both bits are set both edges will be enabled and a
capture will occur for either transition. The last bit in the register
ECOM (CCAPMn.6) when set enables the comparator function.
Figure 8 shows the CCAPMn settings for the various PCA functions.
There are two additional registers associated with each of the PCA
modules. They are CCAPnH and CCAPnL and these are the
registers that store the 16-bit count when a capture occurs or a
compare should occur. When a module is used in the PWM mode
these registers are used to control the duty cycle of the output.
PCA Capture Mode
To use one of the PCA modules in the capture mode either one or
both of the CCAPM bits CAPN and CAPP for that module must be
set. The external CEX input for the module (on port 2) is sampled for
a transition. When a valid transition occurs the PCA hardware loads
the value of the PCA counter registers (CH and CL) into the
module’s capture registers (CCAPnL and CCAPnH). If the CCFn bit
for the module in the CCON SFR and the ECCFn bit in the CCAPMn
SFR are set then an interrupt will be generated. Refer to Figure 9.
16-bit Software Timer Mode
The PCA modules can be used as software timers by setting both
the ECOM and MAT bits in the modules CCAPMn register. The PCA
timer will be compared to the module’s capture registers and when a
match occurs an interrupt will occur if the CCFn (CCON SFR) and
the ECCFn (CCAPMn SFR) bits for the module are both set (see
Figure 10).
High Speed Output Mode
In this mode the CEX output (on port 2) associated with the PCA
module will toggle each time a match occurs between the PCA
counter and the module’s capture registers. To activate this mode
the TOG, MAT, and ECOM bits in the module’s CCAPMn SFR must
be set (see Figure 11).
Pulse Width Modulator Mode
All of the PCA modules can be used as PWM outputs. Figure 12
shows the PWM function. The frequency of the output depends on
the source for the PCA timer. All of the modules will have the same
frequency of output because they all share the PCA timer. The duty
cycle of each module is independently variable using the module’s
capture register CCAPLn. When the value of the PCA CL SFR is
less than the value in the module’s CCAPLn SFR the output will be
low, when it is equal to or greater than the output will be high. When
CL overflows from FF to 00, CCAPLn is reloaded with the value in
CCAPHn. the allows updating the PWM without glitches. The PWM
and ECOM bits in the module’s CCAPMn register must be set to
enable the PWM mode.
PCA Interrupt System
The PCA on most 80C51 family devices provides a single interrupt
source, EC (IE.6). The 8xC576 expands the flexibility of the PCA by
providing additional interrupt sources for each of the five PCA
modules, EC0 (IE1.0) through EC4 (IE1.4), in addition to the original
interrupt source EC (IE.6). Any of these sources can be enabled at
any time. It is possible for both a module source (EC0 through EC4)
to be enabled at the same time that the single source, EC, is
enabled. In this case, a module event will generate an interrupt for
both the module source and the single source, EC.
16 BITS
MODULE 0
P2.0/CEX0
16 BITS
MODULE 1
P2.1/CEX1
PCA TIMER/COUNTER
MODULE 2
P2.2/CEX2
TIME BASE FOR PCA MODULES
MODULE FUNCTIONS:
16-BIT CAPTURE
16-BIT TIMER
16-BIT HIGH SPEED OUTPUT
8-BIT PWM
WATCHDOG TIMER (MODULE 4 ONLY)
MODULE 3
MODULE 4
Figure 2. Programmable Counter Array (PCA)
P2.3/CEX3
P2.6/CEX4
SU00578
1998 Jun 04
11

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet P83C576EBBB.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
P83C576EBBB80C51 8-bit microcontroller family 8K/256 OTP/ROM/ 6 channel 10-bit A/D/ 4 comparators/ failure detect circuitry/ watchdog timerNXP Semiconductors
NXP Semiconductors

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar