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PDF P80CL580 Datasheet ( Hoja de datos )

Número de pieza P80CL580
Descripción Low voltage 8-bit microcontrollers with UART/ I2C-bus and ADC
Fabricantes NXP 
Logotipo NXP Logotipo

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P80CL580 Hoja de datos, Descripción, Manual
INTEGRATED CIRCUITS
DATA SHEET
P80CL580; P83CL580
Low voltage 8-bit microcontrollers
with UART, I2C-bus and ADC
Product specification
Supersedes data of 1996 Oct 04
File under Integrated circuits, IC20
1997 Mar 14

1 page

P80CL580 pdf
Philips Semiconductors
Low voltage 8-bit microcontrollers with
UART, I2C-bus and ADC
6 FUNCTIONAL DIAGRAM
Product specification
P80CL580; P83CL580
handbook, full pagewidth
XTAL1
XTAL2
EA
PSEN
ALE
PWM0
VSSA
Vref(p)(A)
ADC3
ADC2
ADC1
ADC0
P80CL580
P83CL580
PORT 0
LOW ORDER
ADDRESS
AND
DATA BUS
PORT 1
T2 INT2
T2EX INT3
STADC INT4
INT5
INT6
INT7
SCL INT8
SDA
PORT 2
HIGH ORDER
ADDRESS
BUS
PORT 4
RST
EWN
PORT 3
MBB541
VSS
VDD
RXD
TXD
INT0
INT1
T0
T1
WR
RD
1997 Mar 14
Fig.2 Functional diagram.
5

5 Page

P80CL580 arduino
Philips Semiconductors
Low voltage 8-bit microcontrollers with
UART, I2C-bus and ADC
Product specification
P80CL580; P83CL580
9 MEMORY ORGANIZATION
The P8xCL580 has 6 kbytes of Program Memory (ROM;
P83CL580 only) plus 256 bytes of Data Memory (RAM) on
board.The device has separate address spaces for
Program and Data Memory (see Fig.6). Using Port latches
P0 and P2, the P8xCL580 can address up to 128 kbytes of
external memory. The CPU generates both read (RD) and
write (WR) signals for external Data Memory accesses,
and the read strobe (PSEN) for external Program Memory.
9.1 Program Memory
The P83CL580 contains 6 kbytes of internal ROM. After
reset the CPU begins execution at location 0000H.
The lower 6 kbytes of Program Memory can be
implemented in either on-chip ROM or external Program
Memory.
If the EA pin is tied to VDD, then Program Memory fetches
from addresses 0000H to 17FFH are directed to the
internal ROM. Fetches from addresses 1800H to FFFFH
are directed to external ROM. Program Counter values
greater than 17FFH are automatically addressed to
external memory regardless of the state of the EA pin.
9.2 Data Memory
The P8xCL580 contains 256 bytes of internal RAM and
40 Special Function Registers (SFRs). Figure 6 shows the
internal Data Memory space divided into the lower
128 bytes, the upper 128 bytes, and the SFRs space.
Internal RAM locations 0 to 127 are directly and indirectly
addressable. Internal RAM locations 128 to 255 are only
indirectly addressable. The Special Function Register
locations 128 to 255 bytes are only directly addressable.
9.4 Addressing
The P8xCL580 has five methods for addressing source
operands:
Register
Direct
Register-indirect
Immediate
Base-register plus index-register-indirect.
The first three methods can be used for addressing
destination operands. Most instructions have a
‘destination/source’ field that specifies the data type,
addressing methods and operands involved. For
operations other than MOVs, the destination operand is
also a source operand.
halfpage
7FH
30H
2FH
bit-addressable space
(bit addresses 0 to 7F)
20H
R7 1FH
R0 18H
R7 17H
9.3 Special Function Registers (SFRs)
The upper 128 bytes are the address locations of the
SFRs. Figures 7 and 8 show the Special Function
Registers space. The SFRs include the port latches,
timers, peripheral control, serial I/O registers, etc. These
registers can only be accessed by direct addressing.
There are 128 directly addressable locations in the SFR
address space. Bit addressable SFRs are those that end
in 000B.
R0 10H 4 banks of 8 registers
R7 0FH (R0 to R7)
R0 08H
R7 07H
R0 0 MLA560 - 1
Fig.5 The lower 128 bytes of internal RAM.
1997 Mar 14
11

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