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PDF P80CL51HFT Datasheet ( Hoja de datos )

Número de pieza P80CL51HFT
Descripción Low voltage 8-bit microcontrollers with UART
Fabricantes NXP 
Logotipo NXP Logotipo

Total 68 Páginas
		
P80CL51HFT Hoja de datos, Descripción, Manual
INTEGRATED CIRCUITS
DATA SHEET
P80CL31; P80CL51
Low voltage 8-bit microcontrollers
with UART
Product specification
Supersedes data of January 1995
File under Integrated circuits, IC20
1997 Apr 15

1 page

P80CL51HFT pdf
Philips Semiconductors
Low voltage 8-bit microcontrollers with
UART
5 BLOCK DIAGRAM
Product specification
P80CL31; P80CL51
1997 Apr 15
5

5 Page

P80CL51HFT arduino
Philips Semiconductors
Low voltage 8-bit microcontrollers with
UART
Product specification
P80CL31; P80CL51
8 FUNCTIONAL DESCRIPTION OVERVIEW
This chapter gives a brief overview of the device.
The detailed functional description is in the following
chapters as follows:
Chapter 9 “Memory organization”
Chapter 10 “I/O facilities”
Chapter 11 “Timers/event counters”
Chapter 12 “Reduced power modes”
Chapter 13 “Standard serial interface SIO0: UART”
Chapter 14 “Interrupt system”
Chapter 15 “Oscillator circuitry”
Chapter 16 “Reset”.
8.1 General
The P80CLx1 is a stand-alone high-performance CMOS
microcontroller designed for use in real-time applications
such as instrumentation, industrial control, intelligent
computer peripherals and consumer products.
The device provides hardware features, architectural
enhancements and new instructions to function as a
controller for applications requiring up to 64 kbytes of
Program Memory and/or up to 64 kbytes of Data Memory.
The P80CLx1 contains 4 kbytes Program Memory (ROM;
P80CL51 only); a static 128 bytes Data Memory (RAM);
32 I/O lines; two16-bit timer/event counters;
a thirteen-source, two priority-level, nested interrupt
structure and on-chip oscillator and timing circuit.
A standard UART serial interface is also provided.
The device has two software-selectable modes of reduced
activity for power reduction:
Idle mode; freezes the CPU while allowing the timers,
serial I/O and interrupt system to continue functioning.
Power-down mode; saves the RAM contents but
freezes the oscillator causing all other chip functions to
be inoperative.
8.2 CPU timing
A machine cycle consists of a sequence of 6 states. Each
state lasts for two oscillator periods, thus a machine cycle
takes 12 oscillator periods or 1 µs if the oscillator
frequency (fosc) is 12 MHz.
1997 Apr 15
11

11 Page


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