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Número de pieza P80CE560EFB
Descripción 8-bit microcontroller
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
P8xCE560
8-bit microcontroller
Product specification
File under Integrated Circuits, IC20
1997 Aug 01

1 page




P80CE560EFB pdf
Philips Semiconductors
8-bit microcontroller
4 BLOCK DIAGRAM
Product specification
P8xCE560
1997 Aug 01
5

5 Page





P80CE560EFB arduino
Philips Semiconductors
8-bit microcontroller
Product specification
P8xCE560
8 MEMORY ORGANIZATION
The Central Processing Unit (CPU) manipulates operands
in three memory spaces; these are the 64 kbytes external
Data Memory, 2048 bytes internal Data Memory
(consisting of 256 bytes standard RAM and 1792 bytes
AUX-RAM) and the 64 kbytes internal or 64 kbytes
external Program Memory (see Fig.4).
8.2 Internal Data Memory
The internal Data Memory is divided into three physically
separated parts: 256 bytes of RAM, 1792 bytes of
AUX-RAM, and a 128 bytes Special Function Registers
(SFRs) area. These parts can be addressed each in a
different way as described in Sections 8.2.1 to 8.2.2 and
Table 3.
8.1 Program Memory
The Program Memory of the P8xCE560 consists of
64 kbytes ROM or 64 kbytes EPROM. If, during reset, the
EA pin was held HIGH, the P8xCE560 always executes
out of the internal Program Memory. If the EA pin was held
LOW during reset the P8xCE560 fetches all instructions
from the external Program Memory. The EA input is
latched during reset and is don’t care after reset.
The internal Program Memory content is protected by
setting a mask programmable security bit (ROM) or by the
software programmable security bits (EPROM)
respectively, i.e. it cannot be read out at any time by any
test mode or by any instruction in the external Program
Memory space. The MOVC instructions are the only ones
which have access to program code in the internal or
external Program Memory. The EA input is latched during
reset and is don’t care after reset. This implementation
prevents from reading internal program code by switching
from external Program Memory to internal Program
Memory during MOVC instruction or an instruction that
handles immediate data. Table 2 lists the access to the
internal and external Program Memory with MOVC
instructions whether the security feature has been
activated or not.
Due to the maximum size of the internal Program Memory,
the MOVC instructions can always operate either in the
internal or in the external Program Memory.
Table 2 Memory access by the MOVC instruction
For code protection of the P87CE560 see Section 23.2.
MOVC
INSTRUCTION
MOVC in internal
Program Memory
MOVC in external
Program Memory
PROGRAM MEMORY ACCESS
INTERNAL
YES
EXTERNAL
NO(1)
NO(1)
YES
Note
1. Not applicable due to 64 kbytes internal Program
Memory.
Table 3 Internal Data Memory map
MEMORY
RAM
SFR
AUX-RAM
LOCATION
0 to 127
128 to 255
128 to 255
0 to 1791
ADDRESS MODE
Direct and indirect
Indirect only
Direct only
Indirect only with MOVX
8.2.1 RAM
RAM 0 to 127 can be addressed directly and indirectly
as in the 80C51. Address pointers are R0 and R1 of the
selected register bank.
RAM 128 to 255 can only be addressed indirectly.
Address pointers are R0 and R1 of the selected register
bank.
Four register banks, each 8 registers wide, occupy
locations 0 through 31 in the lower RAM area. Only one of
these banks may be enabled at a time. The next 16 bytes,
locations 32 through 47, contain 128 directly addressable
bit locations. The stack can be located anywhere in the
internal 256 bytes RAM. The stack depth is only limited by
the available internal RAM space of 256 bytes (see Fig.6).
All registers except the Program Counter and the four
register banks reside in the Special Function Register
address space.
8.2.2 SPECIAL FUNCTION REGISTERS
The Special Function Registers can only be addressed
directly in the address range from 128 to 255 (see Fig.7).
8.2.3 AUX-RAM
AUX-RAM 0 to 1791 is indirectly addressable via page
register (XRAMP) and MOVX-Ri instructions, unless it is
disabled by setting ARD = 1 (see Fig.5). When
executing from internal Program Memory, an access to
AUX-RAM 0 to 1791 will not affect the ports P0, P2,
P3.6 and P3.7.
AUX-RAM 0 to 1791 is also indirectly addressable as
external Data Memory locations 0 to 1791 via MOVX-Ri
instructions, unless it is disabled by setting ARD = 1.
1997 Aug 01
11

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