DataSheet.es    


PDF TEA6324 Data sheet ( Hoja de datos )

Número de pieza TEA6324
Descripción Sound control circuit
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



Hay una vista previa y un enlace de descarga de TEA6324 (archivo pdf) en la parte inferior de esta página.


Total 36 Páginas

No Preview Available ! TEA6324 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TEA6324T
Sound control circuit
Preliminary specification
File under Integrated Circuits, IC01
1997 Mar 13

1 page




TEA6324 pdf
Philips Semiconductors
Sound control circuit
Preliminary specification
TEA6324T
FUNCTIONAL DESCRIPTION
The source selector selects one of 2 stereo inputs or the
mono input. The maximum input signal voltage is
Vi(rms) = 2 V. The outputs of the source selector and the
inputs of the following volume control parts are available at
pins 7 and 8 for the left channel and pins 17 and 18 for the
right channel. This offers the possibility of interfacing a
noise reduction system.
The volume control function is split into two sections:
volume I control block and volume II control block.
The control range of volume I is between +20 dB and
31 dB in steps of 1 dB. The volume II control range is
between 0 dB and 55 dB in steps of 1 dB.
The recommended control range to be used is 86 dB
(+20 to 66 dB) although in theory, a range of 106 dB
(+20 to 86 dB) can be attained. The gain/attenuation
setting of the volume I control block is common for both
channels.
The volume I control block is followed by the bass control
block. The frequency response of the bass control (see
Fig.3) is provided for each channel by an external filter in
combination with internal resistors. The adjustable range
is between 18 and +18 dB in steps of 1.8 dB at 46 Hz.
The treble control block offers a control range between
12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter
characteristic is determined by a single capacitor of 5.6 nF
for each channel in combination with internal resistors
(see Fig.4).
The basic step width of treble control is 3 dB.
The intermediate steps are obtained by switching 1.5 dB
boost and 1.5 dB attenuation steps.
The bass and treble control functions can be switched off
via I2C-bus. In this event the internal signal flow is
disconnected. The connections B2L and B2R are outputs
and TL and TR are inputs for inserting an external
equalizer.
The last section of the circuit is the volume II block.
The balance function uses the same control block. This is
achieved by 2 independently controllable attenuators, one
for each output. The control range of these attenuators is
55 dB in steps of 1 dB with an additional mute step.
The circuit provides 3 mute modes:
1. Zero crossing mode mute via I2C-bus using
2 independent zero crossing detectors (ZCM,
see Tables 2 and 8 and Fig.15)
2. Fast mute via MUTE pin (see Fig.9)
3. Fast mute via I2C-bus either by general mute (GMU,
see Tables 2 and 8) or volume II block setting
(see Table 4).
The mute function is performed immediately if ZCM is
cleared (ZCM = 0). If the bit is set (ZCM = 1) the mute is
activated after changing the GMU bit. The actual mute
switching is delayed until the next zero crossing of the
audio frequency signal. Two comparators are built-in to
provide independent mute switches to control each of the
audio channels (left and right).
To avoid a large delay of mute switching when very low
frequencies are processed, the maximum delay time is
limited to typically 100 ms by an integrated timing circuit
and an external capacitor (Cm = 10 nF, see Fig.9). This
timing circuit is triggered by reception of a new data word
for the switch function which includes the GMU bit. After a
discharge and charge period of an external capacitor the
muting switch follows the GMU bit, only if no zero crossing
was detected during that time.
The mute function can also be controlled externally (see
Fig.9). If the mute pin is switched to ground all outputs are
muted immediately (hardware mute). This mute request
overwrites all mute controls via the I2C-bus for the time the
pin is held LOW. The hardware mute position is not stored
in the TEA6324T.
Typically, the turn on/off can be used to avoid AF output.
This can be caused by the input signal from preceding
stages, which may produce output during a drop of VCC.
To avoid this, the mute must be set prior to a VCC drop and
can be achieved either by I2C-bus control, or by grounding
the MUTE pin.
In cases where there is no mute in the application before
turn off, a supply voltage drop of more than 1 × VBE will
result in a mute during the voltage drop.
The power supply should include a VCC buffer capacitor,
which provides a discharging time constant. If the input
signal does not disappear after turn off the input will
become audible after a certain time. A 4.7 kresistor
discharges the VCC buffer capacitor, because the internal
current of the IC does not discharge it completely.
The hardware mute function is ideal for use in Radio Data
System (RDS) applications. The zero crossing mute
avoids modulation plops. This feature is an advantage for
mute during changing presets and/or sources (e.g. traffic
announcement during cassette playback).
1997 Mar 13
5

5 Page





TEA6324 arduino
Philips Semiconductors
Sound control circuit
Preliminary specification
TEA6324T
I2C-BUS PROTOCOL
I2C-bus format
S(1) SLAVE ADDRESS(2)
A(3)
Notes
1. S = START condition.
2. SLAVE ADDRESS (MAD) = 0101 0000.
3. A = acknowledge, generated by the slave.
4. SUBADDRESS (SAD), see Table 1.
5. DATA, see Table 1.
6. P = STOP condition.
SUBADDRESS(4)
Table 1 Second byte after MAD
FUNCTION
BIT
Volume
Output right
Output left
No function
No function
Bass
Treble
Switch
V
OUTR
OUTL
BA
TR
S
Note
1. Significant subaddress.
MSB
7
0
0
0
0
0
0
0
0
6
0
0
0
0
0
0
0
0
5
0
0
0
0
0
0
0
0
4
0
0
0
0
0
0
0
0
A(3) DATA(5) A(3) P(6)
LSB
3 2(1) 1(1) 0(1)
0000
0001
0010
0011
0100
0101
0110
0111
1997 Mar 13
11

11 Page







PáginasTotal 36 Páginas
PDF Descargar[ Datasheet TEA6324.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
TEA6320Sound fader control circuitNXP Semiconductors
NXP Semiconductors
TEA6320TSound fader control circuitNXP Semiconductors
NXP Semiconductors
TEA6321Sound fader control circuitNXP Semiconductors
NXP Semiconductors
TEA6321TSound fader control circuitNXP Semiconductors
NXP Semiconductors

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar