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PDF TEA2164 Data sheet ( Hoja de datos )
| Número de pieza | TEA2164 | |
| Descripción | SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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TEA2164
SWITCH MODE POWER SUPPLY PRIMARY CIRCUIT
. POSITIVE AND NEGATIVE OUTPUT CUR-
RENT UP TO 1.2A AND – 1.7A
. A TWO LEVEL COLLECTOR CURRENT LIMI-
TATION
. COMPLETE TURN OFF AFTER LONG DURA-
TION OVERLOADS
. UNDER AND OVER VOLTAGE LOCK-OUT
. SOFT START BY PROGRESSIVE CURRENT
LIMITATION
. DOUBLE PULSE SUPPRESSION
. BURST MODE OPERATION UNDER STAND-
BY CONDITIONS
DESCRIPTION
In a master slave architecture, the TEA2164 control
IC achieves the slave function. Primarily designed
for TV receivers and monitors applications, this
circuit provides an easy synchronization and smart
solution for low power stand by operation.
Located at the primary side the TEA2164 Control
IC ensures :
- the power supply start-up
- the power supply control under stand-by condi-
tions
- the process of the regulation signals sent by the
master circuit located at the secondary side
- directbase drive of the bipolar switching transistor
- the protection of the transistor and the power
supply under abnormal conditions.
For more details, refer to application note AN409.
POWERDIP16
(Plastic Package)
ORDER CODE : TEA2164
PIN CONNECTIONS
G ROUND
I COPY
LONG CAPACITOR OVERLOAD CAPACITO R
SUBSTRATE
SUBSTRATE
PULSE INPUT
OSCILLATOR TIMING RESISTOR
OSCILLATOR TIMING CAPACITOR
1
2
3
4
5
6
7
8
16 VCC SUPPLY VOLTAGE
15 OUTPUT STAGE POSITIVE SUPPLY VOLTAGE
14 OUTPUT (BASE CURRENT)
13 SUBSTRATE
12 SUBSTRATE
11 IC (max.) SENSE
10 LOW FREQUENCY OSCILLATOR CAPACITOR
9 FEEDBACK INPUT IS BURST MODE
December 1992
1/15
1 page  
TEA2164
ELECTRICAL OPERATING CHARACTERISTICS (continued)
Symbol
Parameter
OSCILLATOR, MAX DUTY CYCLE, SYNCHRONIZATION (continued)
Tsyn Synchronization Window
TO
OUTPUT STAGE
I14/I2
IBON
Ic Copy Current Gain
Base Current Starting Pulse
VERY LOW FREQUENCY OSCILLATOR
Burst Duty Cycle
Min. Typ. Max. Unit
1.0 1.5
1000
300
13
mA
%
I. FIELD OF APPLICATION
The TEA2164 control circuit has been designed
primarily for discontinuous mode flyback built with
a master-slave architecture, whatever the field of
application.
But due to its capability to synchronize the transis-
tor switching-off with an external signal (line fly-
back) and due to an adaptedburst-mode operation
for a low power stand-by operation, the TEA2164
offers a smart solution for monitors and TV sets
applications.
Power supply main features :
- maximum output power 140W (transistor forced
gain : 3.5)
Figure 2 : Master Slave Power Supply Architecture
- stand-by mode output power (1W ≤ Psb ≤ 6W ;
efficiency > 50%)
- operating frequency up to 50kHz
- power-switch : bipolar transistor
Adapted master-circuit :
Monitor application
→
Standard TV application →
Digital TV application →
TEA5170
TEA2028B
TEA2029C
TEA2128
TEA5170
TEA5170
(TEA2028B, TEA2029C and TEA2128 are deflec-
tion processors with built-in PWM generator).
AUD IO
OUTP UT
STAGE
Muting
Control
MAINS
INPUT
R
P2
C
V CC
TEA2164
P1
Synchronization
SCANNING
DEVICE
Remote
Stand-by
VO LTAGE
R EGULATOR
Remote
Stand-by
TEA5170
µP
PWM
VCC
INFRA-RED
RECEIVER
P1 : Output voltage adjustement in normal mode
P2 : Output voltage adjustement in s tand-by
Small signal primary ground
Power primary ground
Secondary ground (isolated from mains)
5/15
5 Page 
Operation after synchronization
TEA2164
(1) NORMAL OPERATION
∆T : synchronization window
Operation after synchronization
(2) NEGATIVE PULSE MISSING
Transistor turn-off is ensured by VCM1 current limi tation cross-
ing or by an internal tON (max.) limitation set by a 2.5V threshold
(3) ERRATIC POSITIVE PULSES
P1 and P2 are masked due to the synchronization window
Cases (2) (3) (4) do not occur in normal operating.
IV - MAXIMUM DUTY CYCLE LIMITATION
Burst mode : The maximum duty cycle is controlled
by the voltage on Pin 9 (Figure 13).
Synchronized mode : Normally the maximum duty
cycle is set by the master circuit. Oowever the
maximum conducting time will never exceed the
value given by the comparison of the oscillator
wave-form with the 2.5V internal threshold.
V - OUTPUT STAGE
TEA2164 output stage has been designed to drive
switching bipolar transistor.
- Each base drive begins with a positive pulse IBON
(4) Fsynchro < 0.65 Fo
Signal S1 triggers burst oscillator capacitor discharge.
The TEA2164 restarts in burst-mode
that realizes an efficient transistor turn-on.
- After the starting pulse IBON, the base current is
proportional to the collector current. The current
gain is easily fixed by a resistor R (Figure 14).
- A fast and safe transistor turn-off is realized by a
fast positive base current cut-off and by applying
a negative base drive which draws stored carri-
ers. A typical 0.7s delay prevents from cross-con-
duction of positive and negative output stages.
Remark : In order to reduce power dissipation on
the positive output stage with the low gain transis-
tors, for high base currents the positive output stage
operates in saturated mode (Figure 15). This can
be achieved by using a resistor between VCC and
V+.
11/15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet TEA2164.PDF ] | |
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