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Número de pieza TDA9860
Descripción Universal HiFi audio processor for TV
Fabricantes NXP Semiconductors 
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No Preview Available ! TDA9860 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA9860
Universal HiFi audio processor for
TV
Preliminary specification
File under Integrated Circuits, IC02
July 1994

1 page




TDA9860 pdf
Philips Semiconductors
Universal HiFi audio processor for TV
Preliminary specification
TDA9860
FUNCTIONAL DESCRIPTION
The TDA9860 consists of the following functions:
source select switching block
loudspeaker channel with effect controls
headphone channel
two port outputs for general purpose
I2C-bus control
Source select switching block
The TDA9860 selects and switches the input signals from
three stereo or six mono sources as there are MAIN, AUX
and SCART (Fig.1) to one of the outputs SCART,
loudspeaker and headphone (crossbar-switching Table 3).
Due to the fact, that the main channel (LINE outputs) is
looped outside the circuit (from pins 9 and 24 to pins 10
and 23), signals can be used as LINE output or to insert a
‘surround sound decoder’.
Loudspeaker channel
Volume control is divided into the parts volume 1 and
volume 2 / balance. The first part (55 dB) controls left and
right channels simultaneously; the second part (23 dB)
controls volume and balance of left and right channels
independently. Treble control provides a control range
from 12 to +12 dB and bass control from 12 to +15 dB.
Extended bass control can be provided by an external
T-network (Fig.1) from 15 to +19 dB (2 dB steps).
Effect controls
‘Linear stereo’, ‘stereo with spatial effect (30% or 52%
anti-phase crosstalk)’ and ‘forced mono with or without
pseudo-stereo effect’ are controlled by three bits. A muting
of 85 dB is provided.
Headphone channel
The headphone channel is only equipped with volume /
balance control. A muting of 85 dB is provided.
I2C-bus control
All settings of control are stored in subaddress registers.
Data transmission is simplified by auto-incrementing the
subaddresses. The on-chip power on reset sets the mute
bit to active, so all 3 stereo outputs are muted.
The muting can be switched off by writing a ‘0’ (non-muted)
into the mute control bits.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VP
Vn
IO
Ptot
Tstg
Tamb
VESD
supply voltage (pin 6)
voltage on all pins, ground excluded
output current
at pins 15, 18, 13, 20, 7 and 26
at pins 2 and 31
total power dissipation
storage temperature
operating ambient temperature
electrostatic handling for all pins (note 1)
electrostatic handling for all pins (note 2)
Notes to the Limiting Values
1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor.
2. Equivalent to discharging a 100 pF capacitor through a 1.5 kseries resistor.
MIN.
0
0
MAX.
10
VP
UNIT
V
V
2.5 mA
1.5 mA
850 mW
25 +150 °C
0 +70 °C
− ±300 V
− ±2000 V
THERMAL RESISTANCE
SYMBOL
Rth j-a
PARAMETER
from junction to ambient in free air
July 1994
5
THERMAL RESISTANCE
60 K/W

5 Page





TDA9860 arduino
Philips Semiconductors
Universal HiFi audio processor for TV
Preliminary specification
TDA9860
Table 2 Bits of data bytes.
FUNCTION OF THE BITS IN TABLE 1
V00 to V05
VL0 to VL4
VR0 to VR4
BA0 to BA4
TR0 to TR3
VHL0 to VHL5
VHR0 to VHR5
I00 to I03
I10 to I13
I20 to I23
MU0, MU1 and MU2
EF1, EF2 and ST
P1 and P2
DESCRIPTION
volume control common for loudspeaker channel
volume control LEFT for loudspeaker channel
volume control RIGHT for loudspeaker channel
bass control for LEFT and RIGHT loudspeaker channel
treble control for LEFT and RIGHT loudspeaker channel
volume control LEFT for headphone channel
volume control RIGHT for headphone channel
input selection for headphone channel
input selection for SCART channel
input selection for loudspeaker channel
mute control bits: 0 = non-muted; 1 = muted
special mode control bits
control bits for port P1 (pin 2) and P2 (pin 31):
output levels: 0 = LOW; 1 = HIGH
Table 3 Output and input selection by subaddress bytes 07, 08 and 09.
OUTPUT AND INPUT CONTROL BYTES, MUTE INCLUDED (EFFECTS TABLE 4)
SELECT OUTPUT PINS
INPUT GROUP
INPUT
SIGNAL
ADDR
DATA BYTE TO SUBADDRESS
Loudspeaker channels
output pin 18 output pin 15
09 EF2 MU2 EF1 ST I23 I22 I21 I20
SCART channels
output pin 26 output pin 7
08 0 MU1 P1 P2 I13 I12 I11 I10
headphone channels
output pin 20 output pin 13
SELECT INPUT SIGNAL
PINS
28 28 AUX LEFT
30 30 AUX RIGHT
28 30 AUX STEREO
1 1 SCART LEFT
32 32 SCART RIGHT
1 32 SCART STEREO
3 3 MAIN LEFT
5 5 MAIN RIGHT
3 5 MAIN STEREO
07
HEX
Vi 1 XB
Vi 2 X9
VI 1 and Vi 2 X7
Vi 3 XA
Vi 4 X5
Vi 3 and Vi 4 X6
Vi 5 XC
Vi 6 XD
Vi 5 and Vi 6 X8
0
X
X
X
X
X
X
X
X
X
MU0 0 0 I03 I02 I01 I00
BITS OF DATA BYTE
0 X X1 0 1 1
0 X X1 0 0 1
0 X X0 1 1 1
0 X X1 0 1 0
0 X X0 1 0 1
0 X X0 1 1 0
0 X X1 1 0 0
0 X X1 1 0 1
0 X X1 0 0 0
Note
1. X = don’t care
July 1994
11

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