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PDF TDA9111 Data sheet ( Hoja de datos )

Número de pieza TDA9111
Descripción LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
Fabricantes ST Microelectronics 
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TDA9111
LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR
FOR MULTISYNC MONITOR
FEATURES
General
s SYNC PROCESSOR (separate or composite)
s 12V SUPPLY VOLTAGE
s 8V REFERENCE VOLTAGE
s HOR. LOCK/UNLOCK OUTPUT
s HOR. & VERT. LOCK/UNLOCK INDICATION
s READ/WRITE I2C INTERFACE
s HORIZONTAL AND VERTICAL MOIRE
s B+ REGULATOR
- Internal PWM generator for B+ current mode
step-up converter
- Switchable to step-down converter
- I2C adjustable B+ reference voltage
- Output pulses synchronized on horizontal
frequency
- Internal maximum current limitation.
Horizontal
s Self-adaptative
s Dual PLL concept
s 150kHz maximum frequency
s X-Ray protection input
s I2C controls: Horizontal duty-cycle, H-position,
horizontal size amplitude
Vertical
s Vertical ramp generator
s 50 to 185Hz AGC loop
s Geometry tracking with VPOS & VAMP
s I2C controls:
VAMP, VPOS, S-CORR, C-CORR
s DC breathing compensation
I2C Geometry corrections
s Vertical parabola generator (Pin Cushion - E/W,
Keystone, Corner Correction)
s Horizontal dynamic phase (Side Pin Balance &
Parallelogram)
s Horizontal and vertical dynamic focus
(Horizontal Focus Amplitude, Horizontal Focus
Symmetry, Vertical Focus Amplitude)
June 2000
DESCRIPTION
The TDA9111 is a monolithic integrated circuit as-
sembled in a 32-pin shrink dual-in-line plastic
package. This IC controls all the functions related
to horizontal and vertical deflection in multimode
or multi-frequency computer display monitors.
The internal sync processor, combined with the
powerful geometry correction block, makes the
TDA9111 suitable for very high performance mon-
itors, using few external components.
The horizontal jitter level is very low. It is particu-
larly well-suited to high-end 15” and 17” monitors.
Combined with the ST7275 Microcontroller family,
TDA9206 (Video preamplifier) and STV942x (On-
Screen Display controller), the TDA9111 allows
fully-I2C bus-controlled computer display monitors
to be built with a reduced number of external com-
ponents.
SHRINK32 (Plastic Package)
ORDER CODE: TDA9111
PIN CONNECTIONS
H/HVIN
VSYNCIN
HMOI RE/HLOCK
PLL2C
C0
R0
PLL1F
HPOSITION
HFOCUSCAP
FO CUS-O UT
HGND
HFLY
HREF
COMP
REGIN
ISENSE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 5V
31 SDA
30 SCL
29 VCC
28 BOUT
27 GND
26 HOUT
25 XRAY
24 EWOUT
23 VOUT
22 VCAP
21 VREF
20 VAGCCAP
19 VGND
18 VBREATH
17 B + GND
Version 4.2
1/43
1

1 page




TDA9111 pdf
PLL1F
7
POSITION R0 C0
8 65
HFLY PLL2C
12 4
HOUT
26
H/HVIN 1
VSYNCIN 2
HMOIRE 3
/HLOCK
SDA 31
SCL 30
GND 27
5V 32
Phase/Frequency
Comparator
H-Phase(7bits)
VCO
Sync Input
Sync
Select Processor
(1bit)
Lock/Unlock
Identification
VSYNC HFLY
HorizontalMoire
Generator
7 bits+ON/OFF
+Frequency
Phase
Comparator
Phase
Shifter
H-Duty
(7bits)
Hout
Buffer
SPin bal
7bits
x2
x
Safety
Processor
B+
Controller
11 HGND
19 VGND
17 GND
29 VCC
25 XRAY
28 B+OUT
16 ISENSE
14 COMP
15 REGIN
Parallelogram
7bits
VDFAMP
7bits
5V
Internal
reference
(7bits)
I2C Interface
7 bits 7 bits
S and C
Correction
Vertical
Oscillator
Ramp Generator
Geometry
Tracking
VAMP
7bits
Corner x2
7bits
x4
ASmympm, etryx2
E/Wpcc
2x7bits
7bits x2
10 FOCUS
9 HFOCUS-
CAP
Keyst.
7 bits
x
24 EWOUT
DC H7 Sbiiztse
HREF 13
VREF 21
Href
Vref
VPOS
7bits
VerticalMoire
Cancel
7bits+ON/OFF
22 20
18 23
VCAP VAGCCAP VBREATHVOUT
VSYNC
TDA9111

5 Page





TDA9111 arduino
TDA9111
DYNAMIC FOCUS SECTION
Electrical Characteristics (VCC = 12V, Tamb = 25°C)
Symbol
Parameter
Test Conditions
HORIZONTAL DYNAMIC FOCUS FUNCTION (seeFigure 15 on page 29)
HDFst
Horizontal Dynamic Focus Sawtooth
Minimum Level
Maximum Level
Pin 9, capacitor on HFO-
CUSCAP and
C0 = 820pF, TH = 20µs
HDFdis
Horizontal Dynamic Focus Sawtooth Dis-
charge Width
Triggered by HDFstart
HDFstart
Internal Phase Advance versus HFLY
middle
(Independent of frequency)
HDFDC
TDFHD
Bottom DC Output Level
DC Output Voltage Thermal Drift (11)
RLOAD = 10k,
Pin 10
HDFamp
Horizontal Dynamic Focus
Amplitude
Max Byte
Typ Byte
Max Byte
Sub-Address 03,
Pin 10, fH = 50kHz,
Symmetric Wave Form
x1111111
x1000000
x0000000
HDFKeyst
Horizontal Dynamic FocusSymmetry
(For time reference, see Figure 15 )
Advance for Byte
Delay for Byte
Subaddress 04
x1111111 (decimal 127)
x0000000 (decimal 0)
VERTICAL DYNAMIC FOCUS FUNCTION (see Figu re 1)
AMPVDF
Vertical Dynamic Focus Parabola (added
to horizontal) Amplitude with VAMP and
VPOS Typical
Sub-Address 0F
Min Byte x0000000
Typ Byte x1000000
Max Byte x1111111
VDFAMP
Parabola Amplitude Function of VAMP Sub-Address 05
(tracking between VAMP and VDF) with Byte x0000000
VPOS Typ. (seeFigure 1 on page 15 and Byte
(15)) Byte
x1000000
x1111111
VHDFKeyt
Parabola Asymmetry Function of VPOS
Control (tracking between VPOS and
VDF) with VAMP Max.
B/A Ratio
A/B Ratio
Sub-Address 06
Byte
Byte
x0000000
x1111111
Note: 15 S and C correction are inhibited to obtain a linear vertical sawtooth.
Min.
Typ.
2.2
4.9
400
1
2.1
200
1
1.5
3.5
16
16
0
0.5
1
0.6
1
1.5
0.52
0.52
Max. Units
V
V
ns
µs
V
ppm/C
VPP
VPP
VPP
%
%
VPP
VPP
VPP
VPP
VPP
VPP
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