PDF TDA8961 Data sheet ( Hoja de datos )

Número de pieza	TDA8961
Descripción	ATSC/NTSC digital TV front-end chipset
Fabricantes	NXP Semiconductors
Logotipo
1. TDA8961 Hay una vista previa y un enlace de descarga de TDA8961 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA8961 ATSC Digital Terrestrial TV demodulator/decoder Objective speciﬁcation File under Integrated Circuits, IC02 2000 May 19 1 page Philips Semiconductors ATSC Digital Terrestrial TV demodulator/decoder Objective speciﬁcation TDA8961 QUICK REFERENCE DATA SYMBOL PARAMETER VDD IDD fclk fsym fs fc(IF2) IL αro tacq Tamb Ptot supply voltage supply current clock frequency symbol frequency sample frequency second IF centre frequency implementation loss half Nyquist ﬁlter roll-off factor acquisition time ambient temperature total power dissipation Note 1. Corresponds to 12 training sequences. CONDITIONS VDD = 3.3 V note 1 MIN. 2.7 − − − − − − − − −20 − TYP. 3.3 390 12 10.76 36 4 − 11.5 − − 1.3 MAX. 3.6 − − − − − − − 290 +70 − UNIT V mA MHz Msymbols/s MHz MHz dB % ms °C W 2000 May 19 5 5 Page Philips Semiconductors ATSC Digital Terrestrial TV demodulator/decoder Objective speciﬁcation TDA8961 FUNCTIONAL DESCRIPTION The internal architecture of the TDA8961 basically comprises two parts: • The front-end: containing the AGC, carrier recovery, half Nyquist filter, symbol timing recovery, sync recovery and adaptive equalization sections. • The back-end: containing the NTSC co-channel rejection filter, trellis decoder, de-interleaver, the Reed Solomon decoder and de-randomizer sections. Sample rate converter INTRODUCTION The sample rate converter section changes the incoming data frequency of 36 MHz to an internal sampling frequency of twice the symbol rate. The 10-bit wide data from either the TDA8980 or a stand-alone A/D converter (TDA8763A is recommended) arrives at the sample rate converter input of the TDA8961 via inputs ADIN9 to ADIN0. The format of the incoming samples can be programmed by the status of I2C-bus bit AD_FMT (see Table 9). The format can be either two’s complement or binary. The default setting is binary to comply with the TDA8980. Fine AGC The fine AGC section controls the gain of analog signals over a range of ±20 dB. The level of the signal at pins ADIN9 to ADIN0 is monitored and an average level from several samples is acquired. The default number of samples is 64, but this value can be set to 256 by setting I2C-bus bit AGC_SAMPLES (see Table 10). A comparator compares the level of the filtered signal with a threshold level represented by a signed four-bit value set by I2C-bus bits AGC_TR_LOW. The comparator output determines the level at pin AGCOUT which is used to either charge or discharge an off-chip ideal integrator, which in turn, controls the gain of the tuner front-end module. To make the level at pin AGCOUT compatible with the AGC circuits in other devices, the comparator output can be inverted by setting I2C-bus bit AGC_DIR (see Table 10). The default value of bit AGC_DIR is 0 making the output at pin AGCOUT compatible with the AGC circuit in the TDA8980. The levels at pin AGCOUT with respect to the value of bit AGC_DIR are shown in Table 2. The AGC section can be reset by setting I2C-bus bit AGC_RESET (see Table 8). PINNING The functions of the input interface pins are given in Table 1. If a stand-alone A/D converter is used, pin CLK36 is connected externally to pin ADCLK. Table 1 Input interface NAME ADIN9 to ADIN0 ADCLK CLK36 Table 2 AGC FILTER OUTPUT LEVEL Above threshold Below threshold Above threshold Below threshold Equal to threshold FUNCTION 10-bit data input (from external A/D converter) 36 MHz clock signal input clock signal output for sampling incoming data (to external A/D converter) COMPARATOR OUTPUT 1 0 1 0 Z I2C-bus bit AGC_DIR 0 0 1 1 0 Pin AGCOUT 1 0 0 1 Z 2000 May 19 11 11 Page

Páginas	Total 30 Páginas
PDF Descargar	[ Datasheet TDA8961.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
TDA8960	ATSC 8-VSB demodulator and decoder	NXP Semiconductors
TDA8961	ATSC Digital Terrestrial TV demodulator/decoder	NXP Semiconductors
TDA8961	ATSC/NTSC digital TV front-end chipset	NXP Semiconductors

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar