PDF TDA8764TS Data sheet ( Hoja de datos )

Número de pieza	TDA8764TS
Descripción	10-bit high-speed low-power ADC with internal reference regulator
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA8764 10-bit high-speed low-power ADC with internal reference regulator Preliminary speciﬁcation 1999 Jan 12 1 page Philips Semiconductors 10-bit high-speed low-power ADC with internal reference regulator Preliminary speciﬁcation TDA8764 PINNING SYMBOL CLK TC VCCA AGND DEC VRB VRM VI VRT OE VCCD2 DGND2 VCCO OGND GRAY D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 IR DGND1 VCCD1 n.c. PINS SSOP28 LQFP32 DESCRIPTION 1 5 clock input 2 6 twos complement input (input active LOW) 3 7 analog supply voltage (+5 V) 4 8 analog ground 5 10 decoupling input 6 12 reference voltage BOTTOM input 7 13 reference voltage MIDDLE input 8 14 analog input voltage 9 15 reference voltage TOP input 10 16 output enable input (input active LOW) 11 17 digital supply voltage 2 (+5 V) 12 18 digital ground 2 13 19 supply voltage for output stages (2.7 to 3.6 V) 14 20 output ground 15 21 gray code input (input active HIGH) 16 22 data output; bit 0 (LSB) 17 23 data output; bit 1 18 24 data output; bit 2 19 25 data output; bit 3 20 26 data output; bit 4 21 27 data output; bit 5 22 28 data output; bit 6 23 29 data output; bit 7 24 30 data output; bit 8 25 31 data output; bit 9 (MSB) 26 2 in-range data output 27 3 digital ground 1 28 4 digital supply voltage 1 (+5 V) − 1, 9, 11 and 32 not connected 1999 Jan 12 5 5 Page Philips Semiconductors 10-bit high-speed low-power ADC with internal reference regulator Preliminary speciﬁcation TDA8764 SYMBOL PARAMETER BANDWIDTH (fclk = 80 MHZ) /8 VERSION; B analog bandwidth tstLH analog input settling time LOW-to-HIGH tstHL analog input settling time HIGH-to-LOW HARMONICS (fclk = 40 MHZ) /4 VERSION; Hall(FS) harmonics (full-scale); all components second harmonics third harmonics SFDR THD spurious free dynamic range total harmonic distortion HARMONICS (fclk = 80 MHZ)/8 VERSION; Hall(FS) harmonics (full-scale); all components second harmonics third harmonics SFDR spurious free dynamic range THD total harmonic distortion SIGNAL-TO-NOISE RATIO; note 8 SNR(FS) signal-to-noise ratio (full-scale) EFFECTIVE BITS; note 8 EB effective bits TDA8764TS/4; TDA8764HL/4 effective bits TDA8764TS/8; TDA8764HL/8 1999 Jan 12 CONDITIONS MIN. TYP. MAX. UNIT full-scale sine wave; note 6 75% full-scale sine wave; note 6 small signal at mid-scale; Vi = ±10 LSB at code 512; note 6 full-scale square wave; see Fig.7 and note 7 full-scale square wave; see Fig.7 and note 7 − − − − − 40 − 60 − 700 − MHz MHz MHz tbf tbf ns tbf tbf ns fi = 5 MHz fi = 5 MHz fi = 5 MHz − − − − fi = 5 MHz fi = 5 MHz fi = 5 MHz − − − − without harmonics; fi = 5 MHz fclk = 40 MHz; /4 version fclk = 80 MHz; /8 version tbf tbf fclk = 40 MHz fi = 5 MHz fi = 7.5 MHz fi = 10 MHz fi = 20 MHz fclk = 80 MHz fi = 5 MHz fi = 10 MHz fi = 20 MHz fi = 40 MHz tbf tbf tbf tbf tbf tbf tbf tbf 11 −70 tbf −90 tbf tbf − −70 − dBc dBc dBc dB −71 tbf −87 tbf tbf − −70 − dBc dBc dBc dB 58 − 58 − dB dB 9.5 tbf 9.2 tbf 9.0 tbf tbf tbf 9.5 tbf tbf tbf tbf tbf tbf tbf bits bits bits bits bits bits bits bits 11 Page

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