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PDF TDA8761AM Data sheet ( Hoja de datos )

Número de pieza TDA8761AM
Descripción 9-bit analog-to-digital converter for digital video
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! TDA8761AM Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA8761A
9-bit analog-to-digital converter for
digital video
Product specification
Supersedes data of 1997 Aug 21
File under Integrated Circuits, IC02
1998 Nov 03

1 page




TDA8761AM pdf
Philips Semiconductors
9-bit analog-to-digital converter
for digital video
Product specification
TDA8761A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCCA
VCCD
VCCO
VCC
VI
Vi(p-p)
IO
Tstg
Tamb
Tj
PARAMETER
analog supply voltage
digital supply voltage
output stages supply voltage
supply voltage differences
between
VCCA and VCCD
VCCD and VCCO
VCCA and VCCO
input voltage
AC input voltage for switching
(peak-to-peak value)
output current
storage temperature
operating ambient temperature
junction temperature
CONDITIONS
note 1
note 1
note 1
MIN.
0.3
0.3
0.3
referenced to AGND
referenced to DGND
1.0
1.0
1.0
0.3
55
0
MAX.
+7.0
+7.0
+7.0
UNIT
V
V
V
+1.0
+4.0
+4.0
+7.0
VCCD
10
+150
+70
+150
V
V
V
V
V
mA
°C
°C
°C
Note
1. The supply voltages VCCA, VCCD and VCCO may have any value between 0.3 and +7.0 V provided that the supply
voltage differences VCC are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
Rth(j-a)
thermal resistance from junction to ambient
CONDITIONS
in free air
VALUE
110
UNIT
K/W
1998 Nov 03
5

5 Page





TDA8761AM arduino
Philips Semiconductors
9-bit analog-to-digital converter
for digital video
Product specification
TDA8761A
Table 1 Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V, VRT = 3.43 V)
BINARY OUTPUT BITS
TWO’S COMPLEMENT OUTPUT BITS
STEP VI(p-p) IR
D8 D7 D6 D5 D4 D3 D2 D1 D0 D8 D7 D6 D5 D4 D3 D2 D1 D0
U/F <1.46 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
0 1.46 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
1.
1 0 0 0 0 0 0 0 0 1 100000001
. . . . . . . . . . . . .........
. . . . . . . . . . . . .........
510 .
1 1 1 1 1 1 1 1 1 0 011111110
511 3.27 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1
O/F >3.27 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1
Table 2 Mode selection
TC
X
0
1
OE
1
0
0
D8 to D0
high impedance
active; two’s complement
active; binary
high impedance
active
active
IR
handbook, full pagewidth
CLK
tCPH
t CPL
sample N
sample N + 1 sample N + 2
VCCD
50%
0V
Vl
DATA
D0 to D8
t ds
DATA
N-2
DATA
N-1
td
th
DATA
N
DATA
N+1
VCCO
50%
0V
MBG908
1998 Nov 03
Fig.4 Timing diagram.
11

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