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PDF TDA8714T Data sheet ( Hoja de datos )

Número de pieza TDA8714T
Descripción 8-bit high-speed analog-to-digital converter
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! TDA8714T Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA8714
8-bit high-speed analog-to-digital
converter
Product specification
Supersedes data of 1996 Jan 31
File under Integrated Circuits, IC02
1997 Oct 29

1 page




TDA8714T pdf
Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8714
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCCA
VCCD
VCCO
VCC
VCC
VCC
VI
Vclk(p-p)
IO
Tstg
Tamb
Tj
PARAMETER
analog supply voltage
digital supply voltage
output stages supply voltage
supply voltage differences between
VCCA and VCCD
supply voltage differences between
VCCO and VCCD
supply voltage differences between
VCCA and VCCO
input voltage
AC input voltage for switching
(peak-to-peak value)
output current
storage temperature
operating ambient temperature
junction temperature
CONDITIONS
note 1
note 1
note 1
referenced to AGND
referenced to DGND
MIN.
0.3
0.3
0.3
1.0
1.0
1.0
0.3
55
0
MAX.
+7.0
+7.0
+7.0
+1.0
UNIT
V
V
V
V
+1.0
V
+1.0
V
+7.0
VCCD
V
V
10
+150
+70
+150
mA
°C
°C
°C
Note
1. The supply voltages VCCA and VCCD may have any value between 0.3 V and +7.0 V provided the difference
between VCCA and VCCD is between 1 V and +1 V.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
thermal resistance from junction to ambient in free air
SOT137-1
SOT340-1
VALUE
75
119
UNIT
K/W
K/W
1997 Oct 29
5

5 Page





TDA8714T arduino
Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8714
dbook, full pagewidth
V CCD
CE
50 %
output
data
output
data
t dLZ
t dZL
HIGH
HIGH
t dHZ
t dZH
90 %
LOW
50 %
LOW 10 %
TDA8714
CE
50 %
3.3 k
15 pF
V CCD
S1
TEST
tdLZ
tdZL
tdHZ
tdZH
S1
VCCD
VCCD
DGND
DGND
MBD876
fCE = 100 kHz.
Fig.4 Timing diagram and test conditions of 3-state output delay time.
handbook, halfpage
D0 to D7
15 pF
MBB956 - 1
Fig.5 Load circuit for timing measurement.
1997 Oct 29
11

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