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PDF TDA8703 Data sheet ( Hoja de datos )
| Número de pieza | TDA8703 | |
| Descripción | 8-bit high-speed analog-to-digital converter | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TDA8703 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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INTEGRATED CIRCUITS
DATA SHEET
TDA8703
8-bit high-speed analog-to-digital
converter
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
1996 Aug 26
1 page  
Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8703
PINNING
SYMBOL PIN
DESCRIPTION
D1 1 data output; bit 1
D0 2 data output; bit 0 (LSB)
AGND
3 analog ground
VRB
DEC
4 reference voltage bottom (decoupling)
5 decoupling input (internal stabilization
loop decoupling)
n.c. 6 not connected
VCCA
7 positive supply voltage for analog
circuits (+5 V)
VI 8 analog voltage input
VRT 9 reference voltage top (decoupling)
n.c. 10 not connected
O/UF
11 overflow/underflow data output
D7 12 data output; bit 7 (MSB)
D6 13 data output; bit 6
D5 14 data output; bit 5
D4 15 data output; bit 4
CLK 16 clock input
CLK 17 complementary clock input
VCCD
18 positive supply voltage for digital
circuits (+5 V)
VCCO
19 positive supply voltage for output
stages (+5 V)
DGND 20 digital ground
TC 21 input for two's complement output (TTL
level input, active LOW)
CE 22 chip enable input (TTL level input,
active LOW)
D3 23 data output; bit 3
D2 24 data output; bit 2
handbook, halfpage
D1 1
24 D2
D0 2
23 D3
AGND 3
V RB 4
22 CE
21 TC
DEC 5
20 DGND
n.c. 6 TDA8703/ 19 V CCO
V CCA 7 TDA8703T 18 VCCD
VI 8
VRT 9
17 CLK
16 CLK
n.c. 10
15 D4
O/UF 11
14 D5
D7 12
13 D6
MLB034
Fig.2 Pin configuration.
1996 Aug 26
5
5 Page 
Philips Semiconductors
8-bit high-speed analog-to-digital converter
Product specification
TDA8703
handbook, full pagewidth
CE
input
data
outputs
t dHZ
t dLZ
t dZH
t dZL
reference
level
(1.4 V)
2.4 V
0.4 V
MLB035 - 1
Fig.4 3-state delay timing diagram.
handbook, halfpage
D0 to D7
VCCO
2 kΩ
15 pF
IN916
or
IN3064
handbook, halfpage
D0 to D7
C
VCCO
2 kΩ
S1
5
kΩ
IN916
or
IN3064
MGD691
DGND
Fig.5 Load circuit for timing measurement; data
outputs (CE = LOW).
MBB955
S2
DGND
Fig.6 Load circuit for timing measurement;
3-state outputs (CE: fi = 1 MHz; VVI = 3 V);
see Table 3.
1996 Aug 26
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet TDA8703.PDF ] | |
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