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PDF TDA8417 Data sheet ( Hoja de datos )

Número de pieza TDA8417
Descripción TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
DATA SHEET
TDA8417
TV and VTR stereo/dual sound
processor with integrated filters and
I2C-bus control
Preliminary specification
File under Integrated Circuits, IC02
September 1989

1 page




TDA8417 pdf
Philips Semiconductors
TV and VTR stereo/dual sound processor
with integrated filters and I2C-bus control
Preliminary specification
TDA8417
PINNING
1 Control port C1
2 SDA, serial data line (I2C-bus)
3 SCL, serial clock line (I2C-bus)
4 Oscillator input (or quartz)
5 Digital ground (0 V)
6 Not connected, but reserved
7 Sound channel input AF2 (E2)
8 Sound channel input AF1 (E1)
9 External AF input (E4)
10 Not connected, but reserved
11 Output A4 AF 2 output
12 Output A3 AF 2 output
13 Output A2 AF 1 output
14 Output A1 AF 1 output
15 Supply voltage VP
16 Analogue ground (0 V)
17 Ripple rejection improvement
18 Mute input
19 Control port C2
20 Not connected, but reserved
FUNCTIONAL DESCRIPTION
Anti-aliasing filters
Frequency band limitation is performed by a second order Sallen and Key low-pass filter inserted in the AF signal path
and the identification circuit. This limitation is necessary because of the time-discrete signal processing needed to meet
the Nyquist criterium.
Identification
To enable the identification of the transmitted AF signal (mono, stereo or dual sound), the carrier frequency of the second
channel (E2) is also modulated by an identification signal. The identification signal is a 54.6875 kHz pilot carrier signal
which is 50% amplitude modulated by either a 117.4 Hz signal for stereo transmission or by a 274.1 Hz signal for dual
sound transmission.
The identification section of the circuit consists of a 54 kHz high-pass filter followed by a gain controlled amplifier with an
AM demodulator. The total gain of the high-pass filter and the amplifier is approximately 56 dB. The demodulated
identification signal is filtered by the identification band-pass filters, (117.4 Hz for stereo transmission, 274.1 Hz for dual
sound transmission). The output from either filter is converted to a DC signal by a peak detector and the necessary
hysteresis is performed by a Schmitt-trigger. The resultant DC output signals indicate the status of the transmitter (mono,
stereo or dual sound).
September 1989
5

5 Page





TDA8417 arduino
Philips Semiconductors
TV and VTR stereo/dual sound processor
with integrated filters and I2C-bus control
Preliminary specification
TDA8417
Writing to the TDA8417
Writing to the TDA8417 means, writing to either the switch register or the mute and port control register. Which one is to
be addressed is defined by the subaddress (the second byte) as illustrated by Fig.6 below. The third byte contains the
information to be stored in the specified register.
Where:
S = start bit
A = acknowledge bit
P = stop bit
Fig.6 Write format.
Table 4 defines the contents of the mute and port control register.
Table 4 Mute and port control register (1)
D7 D6 D5 D4 D3 D2 D1 D0 DEFINITION
CR3 CR21 CR20 CR11 CR10
XXX
0 0 control port C1 = LOW
XXX
0 1 control port C1 = HIGH
XXX
1 X control port C1 = high impedance
XXX
00
control port C2 = LOW
XXX
01
control port C2 = HIGH
XXX
1X
control port C2 = high impedance
X X X0
mute is active when pin 18 is LOW (default)
X X X1
mute is active when pin 18 is HIGH
Note
1. X = don’t care
September 1989
11

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