|
|
Número de pieza | TDA8357J | |
Descripción | Full bridge vertical deflection output circuit in LVDMOS | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TDA8357J (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
No Preview Available ! INTEGRATED CIRCUITS
DATA SHEET
TDA8357J
Full bridge vertical deflection output
circuit in LVDMOS
Preliminary specification
File under Integrated Circuits, IC02
1999 Nov 10
1 page Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Preliminary specification
TDA8357J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VP supply voltage
VFB flyback supply voltage
Vn DC voltage
pin OUTA
pin OUTB
pins INA, INB, GUARD and FEEDB
In DC current
pins OUTA and OUTB
pins OUTA and OUTB
pins INA, INB, GUARD and FEEDB
Ilu latch-up current
Ves
Ptot
Tstg
Tamb
Tj
electrostatic handling voltage
total power dissipation
storage temperature
ambient temperature
junction temperature
CONDITIONS
MIN.
−
−
MAX. UNIT
18 V
68 V
note 1
−
−
−0.5
68
VP
VP
V
V
V
during scan (p-p)
at flyback (peak); t ≤ 1.5 ms
current into any pin; pin voltage
is 1.5 × VP; note 2
current out of any pin; pin voltage
is −1.5 × VP; note 2
machine model; note 3
human body model; note 4
note 5
−
−
−20
−
−200
−300
−2 000
−
−55
−25
−
2.0
±1.2
+20
+200
−
+300
+2 000
8
+150
+75
150
A
A
mA
mA
mA
V
V
W
°C
°C
°C
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. At Tj(max).
3. Equivalent to 200 pF capacitance discharge through a 0 Ω resistor.
4. Equivalent to 100 pF capacitance discharge through a 1.5 kΩ resistor.
5. Internally limited by thermal protection at Tj ≈ 170 °C.
THERMAL CHARACTERISTICS
In accordance with IEC 747-1.
SYMBOL
PARAMETER
Rth(j-c)
Rth(j-a)
thermal resistance from junction to case
thermal resistance from junction to ambient
CONDITIONS
in free air
MIN.
−
−
TYP.
−
−
MAX. UNIT
6 K/W
65 K/W
1999 Nov 10
5
5 Page Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Preliminary specification
TDA8357J
Heatsink calculation
The value of the heatsink can be calculated in a standard
way with a method based on average temperatures.
The required thermal resistance of the heatsink is
determined by the maximum die temperature of 150 °C.
In general we recommend to design for an average die
temperature not exceeding 130 °C.
EXAMPLE
Measured or given values: Ptot = 3 W; Tamb = 40 °C;
Tj = 110 °C; Rth(j-c) = 5 K/W; Rth(c-h) = 2 K/W.
The required heatsink thermal resistance is given by:
Rth(h – a) = T----j---–-P----Tt--o-a-t--m----b- – (Rth(j – c) + Rth(c – h))
When we use the values given we find:
Rth(h – a) = 1----1---0-3---.-–-0----4---0-- – (5 + 2) = 16 K/W
The heatsink temperature will be:
Th = Tamb + (Rth(h-a) × Ptot) = 40 + (3 × 16) = 90 °C
1999 Nov 10
11
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet TDA8357J.PDF ] |
Número de pieza | Descripción | Fabricantes |
TDA8357 | Full bridge vertical deflection output circuit in LVDMOS | NXP Semiconductors |
TDA8357J | Full bridge vertical deflection output circuit in LVDMOS | NXP Semiconductors |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |