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Número de pieza TDA8260TW
Descripción Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
TDA8260TW
Satellite Zero-IF QPSK/8PSK
downconverter with PLL
synthesizer
Product specification
Supersedes data of 2003 Jun 11
2004 Sep 03

1 page




TDA8260TW pdf
Philips Semiconductors
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
Product specification
TDA8260TW
PINNING INFORMATION
SYMBOL
XT1
XT2
VCC(PLL)
PLLGND
AGCIN
BIASN
RFGND1
VCC(RF)
RFA
RFB
RFGND2
LP1
LP2
QOUT
BBGND1
QBBIN
VCC(BB)
QBBOUT
QIN
IIN
IBBOUT
n.c.
IBBIN
BBGND2
IOUT
CAP2
CAP1
VCOGND
TKB
TKA
VCC(VCO)
BVS
VT
CP
AS
SCL
SDA
XTOUT
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
DESCRIPTION
4 MHz crystal oscillator input 1
4 MHz crystal oscillator input 2
supply voltage for PLL circuit (+5 V)
ground for PLL circuit
AGC input from satellite demodulator and decoder
RF isolation input (+5 V)
ground 1 for RF circuit
supply voltage for RF stage (+5 V)
RF signal input A
RF signal input B
ground 2 for RF circuit
low-pass filter loop filtering output
low-pass filter loop filtering input
quadrature output for AC coupling to pin 16
ground 1 for baseband stage
quadrature baseband AC-coupled input from pin 14
supply voltage for baseband stage (+5 V)
quadrature baseband output to satellite demodulator and decoder
quadrature input for auto-amplitude matching
in-phase input for auto-amplitude matching
in-phase baseband output to satellite demodulator and decoder
not connected
in-phase AC-coupled baseband input from pin 25
ground 2 for baseband stage
in-phase output for AC-coupling to pin 23
amplitude matching loop filtering output 2
amplitude matching loop filtering output 1
ground for VCO circuit
VCO tank circuit input B
VCO tank circuit input A
supply voltage for VCO circuit (+5 V)
bus voltage select input
tuning voltage output for VCO
charge pump output
address selection input
I2C-bus clock input
I2C-bus data input/output
4 MHz crystal oscillator output to satellite demodulator and decoder
2004 Sep 03
5

5 Page





TDA8260TW arduino
Philips Semiconductors
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
Product specification
TDA8260TW
CHARACTERISTICS
Tamb = 25 °C; VCC = 5 V; RL = 1 kand Vo(p-p) = 750 mV on baseband output pins IBBOUT and QBBOUT; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP. MAX. UNIT
Supply
VCC
ICC
VCC(POR)
supply voltage
supply current
supply voltage threshold for
POR active
4.75 5.00 5.25
155
2.7
Performance from RF inputs to I, Q outputs (from pins RFA, RFB to pins IBBOUT, QBBOUT)
PL(LO)
LO power leakage through
pins RFA and RFB
− −75
Gv(RF-BBOUT)(max) maximum voltage gain from pins VAGC = 3 V
RFA, RFB to IBBOUT, QBBOUT
55 57
Gv
Vo(p-p)
AGC range
output voltage (peak-to-peak
value)
VAGC = 0 to 3 V
recommended value
48
50
750
IP2i
IP3i
F
Gv(IQ)
2nd-order interception point
3rd-order interception point
noise figure
voltage gain mismatch between
I and Q
at RF input; VAGC = 0 V
at RF input; VAGC = 0 V
at maximum gain;
VAGC = 3 V
in 22.5 MHz band
19
14
18
1
Eq
quadrature error (absolute
value)
VAGC = 1.5 V;
Vo(p-p) = 750 mV;
measured in baseband
03
Gv(IQ)ripple
td(g)(IQ)(R)
RR60
voltage gain ripple for I or Q
group delay ripple for I or Q
ripple rejection for I and Q
in 30 MHz band
in 22.5 MHz band
fripple = 60 MHz
30
5
2
Pulling sensitivity
3/4LO
sensitivity to pulling on the third see Table 9
harmonic of the external VCO
− −40 35
5/4LO
sensitivity to pulling on the fifth see Table 9
harmonic of the external VCO
− −40 35
V
mA
V
dBm
dB
dB
mV
dBm
dBm
dB
dB
deg
dB
ns
dB
dBc
dBc
VCO and synthesizer
fosc
ϕn(osc)
oscillator frequency range
oscillator phase noise
ϕn phase noise on baseband
outputs
in the satellite band;
foffset = 100 kHz; out of
PLL loop bandwidth
foffset = 1 and 10 kHz;
fCOMP = 1 MHz with
appropriate loop filter
and charge pump
setting
950
100
2 175
94
MHz
dBc/Hz
− −78 dBc/Hz
2004 Sep 03
11

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