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PDF TDA8005A Data sheet ( Hoja de datos )
| Número de pieza | TDA8005A | |
| Descripción | Low-power 3 V/5 V smart card coupler | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
TDA8005A
Low-power (3 V/5 V) smart card
coupler
Preliminary specification
File under Integrated Circuits, IC17
1998 Mar 20
1 page  
Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
Preliminary specification
TDA8005A
PINNING
SYMBOL
n.c.
AGND
S3
K5
P03
P02
P01
n.c.
P00
VDDD
n.c.
TEST1
P11
P12
P13
P14
n.c.
P15
P16
TEST2
P17
RESET
n.c.
n.c.
n.c.
n.c.
n.c.
RxD
TxD
INT1
T0
AUX1
AUX2
P37
XTAL2
XTAL1
DGND
n.c.
PIN
LQFP64 QFP44
1−
21
32
4−
53
64
75
8−
96
10 7
11 −
12 8
13 9
14 10
15 11
16 12
17 −
18 13
19 14
20 15
21 16
22 17
23 −
24 −
25 −
26 −
27 −
28 18
29 19
30 20
31 21
32 22
33 23
34 24
35 25
36 26
37 27
38 −
DESCRIPTION
not connected
analog ground
contact 3 for the step-up converter
output port from port extension
general purpose I/O port (connected to port P03)
general purpose I/O port (connected to port P02)
general purpose I/O port (connected to port P01)
not connected
general purpose I/O port (connected to port P00)
digital supply voltage
not connected
test pin 1 (connected to port P10; must be left open-circuit in the application)
general purpose I/O port or interrupt (connected to port P11)
general purpose I/O port or interrupt (connected to port P12)
general purpose I/O port or interrupt (connected to port P13)
general purpose I/O port or interrupt (connected to port P14)
not connected
general purpose I/O port or interrupt (connected to port P15)
general purpose I/O port or interrupt (connected to port P16)
test pin 2 (connected to PSEN; must be left open-circuit in the application)
general purpose I/O port or interrupt (connected to port P17)
input for resetting the microcontroller (active HIGH)
not connected
not connected
not connected
not connected
not connected
serial interface receive line
serial interface transmit line
general purpose I/O port or interrupt (connected to port P33)
general purpose I/O port (connected to port P34)
push-pull auxiliary output (±5 mA; connected to timer T1 e.g. port P35)
push-pull auxiliary output (±5 mA; connected to timer; port P36)
general purpose I/O port (connected to port P37)
crystal connection
crystal connection or external clock input
digital ground
not connected
1998 Mar 20
5
5 Page 
Philips Semiconductors
Low-power (3 V/5 V) smart card coupler
Preliminary specification
TDA8005A
Clock circuitry
The clock to the microcontroller and the clock to the card
are derived from the main clock signal (XTAL from
2 to 16 MHz, or an external clock signal).
Directly after reset and during power reduction modes the
microcontroller clock frequency fclk equals 1⁄8fINT; fINT is
always present because it is derived from the internal
oscillator and gives the lowest power consumption.
When required (for card session, serial communication or
anything else) the microcontroller may choose to clock
itself with 1⁄2fXTAL, 1⁄4fXTAL or 1⁄2fINT. All frequency changes
are synchronous, thereby ensuring no hang-up due to
short spikes etc.
Cards clock: the microcontroller may select to send the
card a card clock frequency of 1⁄2fXTAL, 1⁄4fXTAL, 1⁄8fXTAL or
1⁄2fINT (≈1.25 MHz), or to stop the clock HIGH or LOW.
All transitions are synchronous, ensuring correct pulse
length during start or change in accordance with
ISO 7816.
After power on, CLK is set at STOP LOW and fclk is set at
1⁄8fINT.
Power-down and sleep modes
The TDA8005A offers a large flexibility for defining power
reduction modes by software. Some configurations are
described below.
In the power-down mode, the microcontroller is in
power-down and the supply and the internal oscillator are
active. The card is not active; this is the smallest power
consumption mode. Any change on P1 ports or on PRES
will wake-up the circuit (for example, a key pressed on the
keyboard, the card inserted or taken off).
In the sleep mode, the card is powered but configured in
the idle or sleep mode. The step-up converter will only be
active when it is necessary to reactivate Vstep-up. When the
microcontroller is in power-down mode any change on P1
ports or on PRES will wake up the circuit.
In both power reduction modes the sequencer is active,
allowing automatic emergency deactivation in the event of
card take-off, hardware problems, or supply dropout.
The TDA8005A is set into power-down or sleep mode by
software. There are several ways to return to normal
mode: insertion or extraction of the card, detection of a
change on P1 (which can be a key pressed) or a command
from the system microcontroller. For example, if the
system monitors the clock signal on XTAL1, it may stop
this clock after setting the device into power-down mode
and then wake it up when sending the clock signal again.
In this situation, the internal clock should have been used
before the fclk.
Peripheral interface
This block allows synchronous serial communication with
the three peripherals (ISO 7816 UART, clock circuitry and
output port extension); see Figs 1 and 5.
handbook, full pagewidth
RESET
P24 P06 P07 P27
DATA STROBE ENABLE REG0
P26
REG1
P25
R/W
P32
INT
PERIPHERAL CONTROL
clock configuration
CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7
UART configuration
UC0 UC1 UC2 UC3 UC4 UC5 UC6 UC7
UART transmit
UT0 UT1 UT2 UT3 UT4 UT5 UT6 UT7
ports extension
PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7
UART receive
UR0 UR1 UR2 UR3 UR4 UR5 UR6 UR7
UART status register
US0 US1 US2 US3 US4 US5 US6 US7
MGL334
Fig.5 Peripheral interface diagram.
1998 Mar 20
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TDA8005A.PDF ] | |
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