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Número de pieza TDA8004AT
Descripción IC card interface
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! TDA8004AT Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA8004AT
IC card interface
Preliminary specification
File under Integrated Circuits, IC02
2000 Feb 29

1 page




TDA8004AT pdf
Philips Semiconductors
IC card interface
Preliminary specification
TDA8004AT
PINNING
SYMBOL PIN I/O
DESCRIPTION
CLKDIV1 1
I control with CLKDIV2 for choosing CLK frequency
CLKDIV2 2
I control with CLKDIV1 for choosing CLK frequency
5V/3V
PGND
3 I control signal for selecting VCC = 5 V (HIGH) or VCC = 3 V (LOW)
4 supply power ground for step-up converter
S2 5 I/O capacitance connection for step-up converter (a 100 nF capacitor with ESR < 100 m
must be connected between pins S1 and S2)
VDDP
S1
VUP
6 supply power supply voltage for step-up converter
7 I/O capacitance connection for step-up converter (a 100 nF capacitor with ESR < 100 m
must be connected between pins S1 and S2)
8 O output of step-up converter (a 100 nF capacitor with ESR < 100 mmust be connected
to PGND)
PRES
9 I card presence contact input (active LOW); if PRES or PRES is true, then the card is
considered as present
PRES
I/O
AUX2
AUX1
CGND
10 I card presence contact input (active HIGH); if PRES or PRES is true, then the card is
considered as present
11 I/O data line to and from card (C7) (internal 10 kpull-up resistor connected to VCC)
12 I/O auxiliary line to and from card (C8) (internal 10 kpull-up resistor connected to VCC)
13 I/O auxiliary line to and from card (C4) (internal 10 kpull-up resistor connected to VCC)
14 supply ground for card signals
CLK 15 O clock to card (C3)
RST
VCC
n.c.
16 O card reset (C2)
17 O supply for card (C1); decouple to CGND with 2 × 100 nF or 1 × 100nF and 1 × 220 nF
capacitors with ESR < 100 mΩ (with 220 nF, the noise margin on VCC will be higher)
18 not connected
CMDVCC 19
I start activation sequence input from microcontroller (active LOW)
RSTIN
20 I card reset input from microcontroller (active HIGH)
VDD
GND
21 supply supply voltage
22 supply ground
OFF
XTAL1
23 O NMOS interrupt to microcontroller (active LOW) with 20 kinternal pull-up resistor
connected to VDD (refer section “Fault detection”)
24 I crystal connection or input for external clock
XTAL2
25 O crystal connection (leave open circuit if an external clock source is used)
I/OUC
26 I/O microcontroller data I/O line (internal 10 kpull-up resistor connected to VDD)
AUX1UC 27 I/O auxiliary line to and from microcontroller (internal 10 kpull-up resistor connected to
VDD)
AUX2UC 28 I/O auxiliary line to and from microcontroller (internal 10 kpull-up resistor connected to
VDD)
2000 Feb 29
5

5 Page





TDA8004AT arduino
Philips Semiconductors
IC card interface
Preliminary specification
TDA8004AT
handbook, full pagewidth
PRES
OFF
CMDVCC
VCC
Deactivation caused by
cards withdrawal
Deactivation caused by
short circuit
FCE665
Fig.7 Behaviour of OFF, CMDVCC, PRES and VCC (see also application note AN97036 for software decision
algorithm on OFF signal).
handbook, full pagewidth
OSC_INT/64
OFF
PRES
VCC
I/O
CLK
RST
tde
t10
t14
t13
high - Z
t12
t11
Fig.8 Emergency deactivation sequence.
FCE664
VCC regulator
The VCC buffer is able to deliver up to 65 mA continuously (at 5V if 5V/3V is HIGH or 3 V if 5V/3V is LOW). It has an
internal overload detection at approximately 90 mA.
This detection is internally filtered, allowing spurious current pulses up to 200 mA to be drawn by the card without causing
a deactivation (the average current value must stay below 65 mA).
For VCC accuracy reasons, a 100 nF capacitor with an ESR < 100 mshould be tied to CGND near pin 17, and a 100 nF
(or better 220 nF) with same ESR should be tied to CGND near to the C1 contact.
2000 Feb 29
11

11 Page







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