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PDF P80C52SBAA Data sheet ( Hoja de datos )

Número de pieza P80C52SBAA
Descripción 80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless/ low voltage 2.7V.5.5V/ low power/ high speed 33 MHz
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA +
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless,
low voltage (2.7V–5.5V), low power, high speed (33 MHz)
Product specification
Supersedes data of 1998 Jun 04
IC20 Data Handbook
1999 Apr 01
Philips
Semiconductors

1 page




P80C52SBAA pdf
Philips Semiconductors
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33 MHz)
Product specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC DIP LCC QFP TYPE NAME AND FUNCTION
VSS
VCC
P0.0–0.7
20 22
16
40 44
38
39–32 43–36 37–30
I Ground: 0V reference.
I Power Supply: This is the power supply voltage for normal, idle, and power-down operation.
I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the
code bytes during program verification and received code bytes during EPROM
programming. External pull-ups are required during program verification.
P1.0–P1.7
1–8 2–9 40–44, I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s
1–3 written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 1 pins that are externally pulled low will source current because of the internal pull-ups.
(See DC Electrical Characteristics: IIL). Port 1 also receives the low-order address byte
during program memory verification.
Alternate functions for 8XC51FX and 8XC51RX+ Port 1 include:
1 2 40 I/O T2 (P1.0): Timer/Counter 2 external count input/Clockout (see Programmable Clock-Out)
2 3 41 I
T2EX (P1.1): Timer/Counter 2 Reload/Capture/Direction Control
3 4 42 I
ECI (P1.2): External Clock Input to the PCA
4 5 43 I/O CEX0 (P1.3): Capture/Compare External I/O for PCA module 0
5 6 44 I/O CEX1 (P1.4): Capture/Compare External I/O for PCA module 1
6 7 1 I/O CEX2 (P1.5): Capture/Compare External I/O for PCA module 2
7 8 2 I/O CEX3 (P1.6): Capture/Compare External I/O for PCA module 3
8 9 3 I/O CEX4 (P1.7): Capture/Compare External I/O for PCA module 4
P2.0–P2.7
21–28 24–31 18–25
I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOV @Ri), port 2 emits the contents of the P2 special function register. Some Port 2 pins
receive the high order address bits during EPROM programming and verification.
P3.0–P3.7 10–17 11,
5,
13–19 7–13
10 11
11 13
12 14
13 15
14 16
15 17
16 18
17 19
5
7
8
9
10
11
12
13
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 3 pins that are externally being pulled low will source current because of the pull-ups.
(See DC Electrical Characteristics: IIL). Port 3 also serves the special features of the 80C51
family, as listed below:
I RxD (P3.0): Serial input port
O TxD (P3.1): Serial output port
I INT0 (P3.2): External interrupt
I INT1 (P3.3): External interrupt
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
RST
9 10 4
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to VSS permits a power-on reset using only an external
capacitor to VCC.
ALE/PROG 30
33
27
O Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 the oscillator frequency, and can be used for external timing or clocking.
Note that one ALE pulse is skipped during each access to external data memory. This pin is
also the program pulse input (PROG) during EPROM programming. ALE can be disabled by
setting SFR auxiliary.0. With this bit set, ALE will be active only during a MOVX instruction.
1999 Apr 01
5

5 Page





P80C52SBAA arduino
Philips Semiconductors
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
Product specification
8XC52/54/58/80C32
8XC51FA/FB/FC/80C51FA
8XC51RA+/RB+/RC+/RD+/80C51RA+
Table 2. 8XC51FA/FB/FC, 8XC51RA+/RB+/RC+/RD+ Special Function Registers
SYMBOL
ACC*
AUXR#
AUXR1#
B*
CCAP0H#
CCAP1H#
CCAP2H#
CCAP3H#
CCAP4H#
CCAP0L#
CCAP1L#
CCAP2L#
CCAP3L#
CCAP4L#
DESCRIPTION
Accumulator
Auxiliary
Auxiliary 1
B register
Module 0 Capture High
Module 1 Capture High
Module 2 Capture High
Module 3 Capture High
Module 4 Capture High
Module 0 Capture Low
Module 1 Capture Low
Module 2 Capture Low
Module 3 Capture Low
Module 4 Capture Low
DIRECT
ADDRESS
E0H
8EH
A2H
F0H
FAH
FBH
FCH
FDH
FEH
EAH
EBH
ECH
EDH
EEH
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
MSB
LSB
E7 E6 E5 E4 E3 E2 E1 E0
EXTRAM
AO
(RX+ only)
– LPEP3 GF3
0
– DPS
F7 F6 F5 F4 F3 F2 F1 F0
RESET
VALUE
00H
xxxxxx00B
xxx0xxx0B
00H
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
xxxxxxxxB
CCAPM0#
CCAPM1#
CCAPM2#
CCAPM3#
CCAPM4#
Module 0 Mode
Module 1 Mode
Module 2 Mode
Module 3 Mode
Module 4 Mode
DAH
DBH
DCH
DDH
DEH
– ECOM CAPP CAPN MAT TOG PWM ECCF x0000000B
– ECOM CAPP CAPN MAT TOG PWM ECCF x0000000B
– ECOM CAPP CAPN MAT TOG PWM ECCF x0000000B
– ECOM CAPP CAPN MAT TOG PWM ECCF x0000000B
– ECOM CAPP CAPN MAT TOG PWM ECCF x0000000B
CCON*#
CH#
CL#
CMOD#
PCA Counter Control
PCA Counter High
PCA Counter Low
PCA Counter Mode
D8H
F9H
E9H
D9H
DF DE DD DC DB DA D9
D8
CF CR
– CCF4 CCF3 CCF2 CCF1 CCF0 00x00000B
00H
00H
CIDL WDTE
– CPS1 CPS0 ECF 00xxx000B
DPTR:
DPH
DPL
IE*
IP*
IPH#
Data Pointer (2 bytes)
Data Pointer High
Data Pointer Low
Interrupt Enable
Interrupt Priority
Interrupt Priority High
83H
82H
A8H
B8H
B7H
AF AE AD AC AB AA A9
00H
00H
A8
EA EC ET2 ES ET1 EX1 ET0 EX0 00H
BF BE BD BC BB BA B9
B8
– PPC PT2 PS PT1 PX1 PT0 PX0 x0000000B
B7 B6 B5 B4 B3 B2 B1 B0
– PPCH PT2H PSH PT1H PX1H PT0H PX0H x0000000B
P0* Port 0
P1* Port 1
P2* Port 2
P3* Port 3
87 86 85 84 83 82 81 80
80H AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 FFH
97 96 95 94 93 92 91 90
90H CEX4 CEX3 CEX2 CEX1 CEX0 ECI T2EX T2 FFH
A7 A6 A5 A4 A3 A2 A1 A0
A0H AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 FFH
B7 B6 B5 B4 B3 B2 B1 B0
B0H RD WR T1 T0 INT1 INT0 TxD RxD FFH
PCON#1 Power Control
87H SMOD1 SMOD0 – POF2 GF1 GF0 PD
* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
– Reserved bits.
1. Reset value depends on reset source.
2. Bit will not be affected by Reset.
3. LPEP – Low Power OTP–EPROM only operation.
IDL 00xx0000B
1999 Apr 01
11

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