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PDF TJA1020 Data sheet ( Hoja de datos )

Número de pieza TJA1020
Descripción LIN transceiver
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! TJA1020 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TJA1020
LIN transceiver
Product specification
Supersedes data of 2001 Dec 17
2002 Jul 17

1 page




TJA1020 pdf
Philips Semiconductors
LIN transceiver
Product specification
TJA1020
Table 1 Operating modes
MODE
Sleep
Standby(1)
Normal
slope
mode
Low slope
mode
NSLP TXD (OUTPUT)
RXD
INH TRANSMITTER
REMARKS
0 weak pull-down floating
floating off
no wake-up request detected
0 weak pull-down if LOW; note 3 HIGH off
remote wake-up;
strong pull-down if
local wake-up;
note 2
wake-up request detected; in
this mode the microcontroller
can read the wake-up source:
remote or local wake-up
1 weak pull-down HIGH:
HIGH normal slope notes 2, 3 and 4
recessive state
mode
LOW:
dominant state
1 weak pull-down HIGH:
HIGH low slope mode notes 2, 3 and 5
recessive state
LOW:
dominant state
Notes
1. The standby mode is entered automatically upon any local or remote wake-up event during sleep mode. Pin INH and
the 30 ktermination resistor at pin LIN are switched on.
2. The internal wake-up source flag (set if a local wake-up did occur and fed to pin TXD) will be reset when entering
normal slope or low slope mode (NSLP goes HIGH).
3. The wake-up interrupt (on pin RXD) is released when entering normal slope or low slope mode (NSLP goes HIGH).
4. The normal slope mode is entered if TXD is set HIGH (set by the microcontroller to recessive) during a positive edge
on NSLP. In the event of a short-circuit to ground on pin TXD, the transmitter will be disabled.
5. The low slope mode is entered if pin TXD is pulled LOW (actively set dominant by the microcontroller or due to a
failure on TXD) during the positive edge on NSLP.
Sleep mode
This mode is the most power saving mode of the TJA1020
and the default state after power-up (first battery supply).
Despite its extreme low current consumption, the TJA1020
can still be waken up remotely via pin LIN, or waken up
locally via pin NWAKE, or activated directly via pin NSLP.
Filters at the inputs of the receiver (LIN), of pin NWAKE
and of pin NSLP are preventing unwanted wake-up events
due to automotive transients or EMI. All wake-up events
have to be maintained for a certain time period (tBUS,
tNWAKE and tgotonorm).
The sleep mode is initiated by a falling edge on the pin
NSLP driven by the microcontroller. After a filter time
continuously driven sleep command (pin NSLP = LOW),
pin INH becomes floating.
In sleep mode the internal slave termination between
pins LIN and BAT is disabled to minimize the power
dissipation in case pin LIN is short-circuited to ground.
Only a weak pull-up between pins LIN and BAT is present.
The sleep mode can be activated independently from the
actual level on pin LIN or NWAKE. So it is guaranteed that
the lowest power consumption is achievable even in case
of a continuous dominant level on pin LIN or a continuous
LOW on pin NWAKE.
Standby mode
The standby mode is entered automatically whenever a
local or remote wake-up occurs while the TJA1020 is in its
sleep mode. These wake-up events activate pin INH and
enable the slave termination resistor at the pin LIN. As a
result of the HIGH condition on pin INH the voltage
regulator and the microcontroller can be activated.
The standby mode is signalled by a LOW level on pin RXD
which can be used as an interrupt for the microcontroller.
In the standby mode (pin NSLP is still LOW), the condition
of pin TXD (weak pull-down or strong pull-down) indicates
the wake-up source: weak pull-down for a remote wake-up
request and strong pull-down for a local wake-up request.
2002 Jul 17
5

5 Page





TJA1020 arduino
Philips Semiconductors
LIN transceiver
Product specification
TJA1020
SYMBOL
PARAMETER
CONDITIONS
MIN.
IIL
LOW-level input current VTXD = 0 V
5
IOL
LOW-level output current standby mode;
1.5
(local wake-up request) VNWAKE = 0 V;
VLIN = VBAT;
VTXD = 0.4 V
Pin NSLP
VIH
VIL
Vhys
RNSLP
IIL
HIGH-level input voltage
LOW-level input voltage
NSLP hysteresis voltage
NSLP pull-down resistor
LOW-level input current
VNSLP = 5 V
VNSLP = 0 V
2
0.3
0.03
125
5
Pin RXD (open-drain)
IOL
LOW-level output current normal slope mode;
1.3
VLIN = 0 V; VRXD = 0.4 V
ILH
HIGH-level leakage
normal slope mode;
5
current
VLIN = VBAT; VRXD = 5 V
Pin NWAKE
VIH HIGH-level input voltage
VBAT 1
VIL LOW-level input voltage
0.3
IIL
NWAKE pull-up current VNWAKE = 0 V
30
ILH
HIGH-level leakage
VNWAKE = 27 V;
5
current
VBAT = 27 V
Pin INH
Rsw(INH)
ILH
switch-on resistance
between pins BAT and
INH
HIGH-level leakage
current
standby; low slope or
normal slope mode;
IINH = 15 mA;
VBAT = 12 V
sleep mode;
5
VINH = 27 V; VBAT = 27 V
Pin LIN
Vo(reces)
LIN recessive output
voltage
VTXD = 5 V; ILIN = 0 mA 0.9VBAT
Vo(dom)
ILH
IIL
RSLAVE
LIN dominant output
voltage
HIGH-level leakage
current
LIN pull-up current
slave termination
resistance to pin BAT
VTXD = 0 V;
VBAT = 8 to 27 V
VTXD = 0 V; VBAT = 7.3 V
VLIN = VBAT
0.6
0.6
1
sleep mode; VLIN = 0 V;
VNSLP = 0 V
standby, low slope or
normal slope mode;
VLIN = 0 V; VBAT = 12 V
2
20
TYP.
0
3
MAX.
+5
UNIT
µA
mA
7
+0.8
0.5
350 800
0 +5
3.5
0 +5
V
V
V
k
µA
mA
µA
VBAT + 0.3 V
VBAT 3.3 V
10 3
µA
0 +5
µA
30 50
0 +5
µA
VBAT
V
0.15VBAT V
1.2 V
0 +1
µA
5 10
µA
30 47
k
2002 Jul 17
11

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